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Patent Searching and Data


Title:
SEMICONDUCTOR DEVICE INCLUDING LATERAL INSULATOR
Document Type and Number:
WIPO Patent Application WO/2022/032566
Kind Code:
A1
Abstract:
A semiconductor device (300), and methods of forming the same. In one example, the semiconductor device (300) includes a trench (305) in a substrate (310) having a top surface (302), and a shield (330) within the trench (305). The semiconductor device (300) also includes a shield liner (315) between a sidewall of the trench (305) and the shield (330), and a lateral insulator (345) over the shield (330) contacting the shield liner (315). The semiconductor device (300) also includes a gate dielectric layer (350) on an exposed sidewall of the trench (305) between the lateral insulator (345) and the top surface (302). The lateral insulator (345) may have a minimum thickness at least two times thicker than a maximum thickness of the gate dielectric layer (350).

Inventors:
MA FEI (CN)
CHEN YAPING (CN)
LIU YUNLONG (CN)
YANG HONG (US)
YANG SHENGPIN (CN)
NIU BAOQIANG (CN)
LIU RUI (CN)
FENG ZHIPENG (CN)
SRIDHAR SEETHARAMAN (US)
KIM SUNGLYONG (US)
Application Number:
PCT/CN2020/108857
Publication Date:
February 17, 2022
Filing Date:
August 13, 2020
Export Citation:
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Assignee:
TEXAS INSTRUMENTS INC (US)
TEXAS INSTRUMENTS JAPAN LTD (JP)
International Classes:
H01L21/336; H01L29/78
Domestic Patent References:
WO2003103056A22003-12-11
WO2009026174A12009-02-26
Foreign References:
CN101785091A2010-07-21
CN105355560A2016-02-24
CN101740394A2010-06-16
CN106298949A2017-01-04
CN107710418A2018-02-16
US20200075758A12020-03-05
US20200044078A12020-02-06
CN105355548A2016-02-24
US20130256786A12013-10-03
US201816042834A2018-07-23
US201916546499A2019-08-21
Other References:
See also references of EP 4197026A4
Attorney, Agent or Firm:
JEEKAI & PARTNERS (CN)
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