SEMICONDUCTOR DEVICE, INFORMATION PROCESSING SYSTEM, AND METHOD FOR WRITING/READING INFORMATION

WIPO Patent Application WO/2016/185848

A1

[Problem] To provide an efficient means for solution for cases where total collision has occurred during a key data writing process. [Solution] In this semiconductor device: key data to be written is divided into a plurality of pieces of divisional data; the plurality of pieces of divisional data are assigned to respective divisional memories; and, by employing each divisional data as an address, an entry address corresponding to said divisional data is written into a memory space specified by a memory address of each said divisional memory. At this time, if an entry address corresponding to another piece of divisional data is already written in the memory space into which an entry address corresponding to a certain piece of divisional data is to be written, collision information indicating entry address collision is entered in the memory space. Further, if collision has occurred for all of the plurality of pieces of divisional data divided from a certain piece of key data, the key data for which total collision has occurred and an entry address corresponding thereto are written into a backup memory.

NISHIZAWA MASATO (JP)
KOBAYASHI KAORU (JP)
OTSUKA KANJI (JP)
SATO YOICHI (JP)
KOUCHI TOSHIYUKI (JP)
UWAI MINORU (JP)

PCT/JP2016/062290

November 24, 2016

April 18, 2016

Click for automatic bibliography generation  

NAGASE & CO LTD (JP)

G11C15/04; G06F17/30

WO2014141566A1

2014-09-18

HIROSE TAKAYUKI (JP)
廣瀬 隆行 (JP)

View/Download PDF      PDF Help

Previous Patent: INPUT/OUTPUT INTERFACE CIRCUIT

Next Patent: SEMICONDUCTOR DEVICE AND METHOD FOR WRITING/READING INFORMATION