SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR

WIPO Patent Application WO/2015/040798

A1

In the present invention, a first substrate is provided with an insulating first surface film on the uppermost layer and a first electrode and an insulating second surface film inside each of a plurality of openings in the first surface film. A second substrate is provided with an insulating third surface film on the uppermost layer and a second electrode and an insulating fourth surface film inside each of a plurality of openings in the third surface film. The first and second electrodes, the first and third surface films, and the second and fourth surface films are each direct joined to each other, respectively. The bottom surface of the second surface film is directly connected to a first seal ring in the first substrate, and the bottom surface of the fourth surface film is directly connected to a second seal ring in the second substrate. A seal ring that is continuous between the first substrate and the second substrate comprises the first seal ring, the second surface film, the fourth surface film and the second seal ring.

KABE TATSUYA
ARAI HIDEYUKI

PCT/JP2014/004347

March 26, 2015

August 25, 2014

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PANASONIC IP MAN CO LTD (JP)

H01L27/00; H01L21/3205; H01L21/768; H01L23/12; H01L23/522; H01L25/065; H01L25/07; H01L25/18

JP2009049313A	2009-03-05
JP2012099742A	2012-05-24
JP2011054637A	2011-03-17
JP2012019147A	2012-01-26
US20070018331A1	2007-01-25
JP2009105160A	2009-05-14
JPH06196569A	1994-07-15

FUJII, Kentaro et al. (JP)
Fujii Kentaro (JP)

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