Title:
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
Document Type and Number:
WIPO Patent Application WO/2016/113797
Kind Code:
A1
Abstract:
A semiconductor device includes a p-type semiconductor region in contact with a bottom face of a trench gate, wherein the p-type semiconductor region includes a first p-type semiconductor region containing a first type of p-type impurities and a second p-type semiconductor region containing a second type of p-type impurities. The first p-type semiconductor region is located between the trench gate and the second p-type semiconductor region. In a view along the depth direction, the second p-type semiconductor region is located within a part of the first p-type semiconductor region. A diffusion coefficient of the second type of p-type impurities is smaller than a diffusion coefficient of the first type of p-type impurities.
Inventors:
NISHIMURA SHINYA (JP)
FUJIWARA HIROKAZU (JP)
SOEJIMA NARUMASA (JP)
TAKEUCHI YUICHI (JP)
FUJIWARA HIROKAZU (JP)
SOEJIMA NARUMASA (JP)
TAKEUCHI YUICHI (JP)
Application Number:
PCT/JP2015/006178
Publication Date:
July 21, 2016
Filing Date:
December 11, 2015
Export Citation:
Assignee:
TOYOTA MOTOR CO LTD (JP)
DENSO CORP (JP)
DENSO CORP (JP)
International Classes:
H01L29/78; H01L29/06; H01L29/66; H01L29/739
Domestic Patent References:
WO2014115280A1 | 2014-07-31 | |||
WO1999067825A2 | 1999-12-29 |
Foreign References:
US20100258815A1 | 2010-10-14 | |||
US20090166730A1 | 2009-07-02 | |||
US20140264564A1 | 2014-09-18 | |||
US20110147766A1 | 2011-06-23 | |||
US20110272710A1 | 2011-11-10 | |||
JP2006128507A | 2006-05-18 |
Attorney, Agent or Firm:
KAI-U PATENT LAW FIRM (6-1 Ushijima-cho, Nishi-ku, Nagoya-sh, Aichi 09, JP)
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