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Patent Searching and Data


Title:
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2011/158821
Kind Code:
A1
Abstract:
The present semiconductor device has multilayer wiring, first electrodes (5) and second electrodes (10a, 10b) provided between the multilayer wiring, and two resistance variable resistance elements (22a, 22b) containing variable resistance element films (9a, 9b) that are sandwiched between the first electrodes (5) and second electrodes (10a, 10b). Either the first electrodes (5) or the second electrodes (10a, 10b) of the two variable resistance elements (22a, 22b) are integrated.

Inventors:
TADA MUNEHIRO (JP)
MIYAMURA MAKOTO (JP)
HADA HIROMITSU (JP)
Application Number:
PCT/JP2011/063567
Publication Date:
December 22, 2011
Filing Date:
June 14, 2011
Export Citation:
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Assignee:
NEC CORP (JP)
TADA MUNEHIRO (JP)
MIYAMURA MAKOTO (JP)
HADA HIROMITSU (JP)
International Classes:
H01L21/82; G11C13/00; G11C29/04; H01L21/3205; H01L23/52; H01L27/10; H01L27/105; H01L45/00; H01L49/00; H03K19/177
Domestic Patent References:
WO2007023569A12007-03-01
WO2009084514A12009-07-09
WO2008149808A12008-12-11
Foreign References:
JP2006140224A2006-06-01
JP2009105383A2009-05-14
JP2008034057A2008-02-14
JP2004272975A2004-09-30
Attorney, Agent or Firm:
MIYAZAKI, Teruo et al. (JP)
Akio Miyazaki (JP)
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Claims: