Title:
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD
Document Type and Number:
WIPO Patent Application WO/2017/099095
Kind Code:
A1
Abstract:
The present invention both ensures a channel formation region and suppresses latch-up. Provided is a semiconductor device comprising: a semiconductor substrate; a plurality of trench parts which are disposed on the front face of the semiconductor substrate and which each have a portion the extends in an extension direction; and an emitter region of a first conduction type and a contact region of a second conduction type, which are disposed between two adjacent trench parts and which are alternately exposed in the extension direction on the front face of the semiconductor substrate. On the front face of the semiconductor substrate, the length of the emitter region at a center position between two trench parts is shorter than the length of the emitter region in a portion in contact with a trench part. At least a portion of the boundary of the emitter region is curved, on the front face of the semiconductor substrate.
Inventors:
NAITO TATSUYA (JP)
Application Number:
PCT/JP2016/086284
Publication Date:
June 15, 2017
Filing Date:
December 06, 2016
Export Citation:
Assignee:
FUJI ELECTRIC CO LTD (JP)
International Classes:
H01L29/739; H01L21/336; H01L27/04; H01L29/78
Foreign References:
| US20040217418A1 | 2004-11-04 | |||
| JP2008034794A | 2008-02-14 | |||
| JP2000106434A | 2000-04-11 | |||
| JP2006059940A | 2006-03-02 |
Attorney, Agent or Firm:
RYUKA IP LAW FIRM (JP)
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