Title:
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
Document Type and Number:
WIPO Patent Application WO/2012/002514
Kind Code:
A1
Abstract:
Disclosed is a semiconductor device wherein a semiconductor substrate has a sensor region and an integrated circuit region, and a hollow is formed directly under the surface layer section in the sensor region.
In the sensor region, a capacitance type acceleration sensor is formed by processing a semiconductor substrate surface layer section that faces the hollow. The capacitance type acceleration sensor includes a comb-teeth-like fixed electrode and a comb-teeth-like movable electrode.
In the integrated circuit region, a CMIS transistor is formed. The CMIS transistor includes a P-type well region and an N-type well region, which are formed in the semiconductor substrate surface layer section. A gate electrode faces the P-type well region and the N-type well region by having a gate insulating film between the gate electrode and the well regions, said gate insulating film being formed on the surface of the semiconductor substrate.
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Inventors:
NAKATANI, Goro (21, Saiin Mizosaki-cho, Ukyo-ku, Kyoto-sh, Kyoto 85, 〒6158585, JP)
Application Number:
JP2011/065111
Publication Date:
January 05, 2012
Filing Date:
June 30, 2011
Export Citation:
Assignee:
ROHM CO., LTD. (21 Saiin Mizosaki-cho, Ukyo-ku Kyoto-sh, Kyoto 85, 〒6158585, JP)
ローム株式会社 (〒85 京都府京都市右京区西院溝崎町２１番地 Kyoto, 〒6158585, JP)
ローム株式会社 (〒85 京都府京都市右京区西院溝崎町２１番地 Kyoto, 〒6158585, JP)
International Classes:
G01C19/56; G01P15/125; H01L21/8249; H01L27/06
Attorney, Agent or Firm:
INAOKA, Kosaku et al. (Sun Mullion NBF Tower 21st Floor, 6-12, Minamihommachi 2-chome, Chuo-ku, Osaka-sh, Osaka 54, 〒5410054, JP)
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Claims: