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Title:
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
Document Type and Number:
WIPO Patent Application WO/2018/154754
Kind Code:
A1
Abstract:
According to the present invention, a gate electrode (6), which has at least a lowermost layer (6a) contacting a semiconductor layer (2) and an upper layer (6b) formed on the lowermost layer (6a), is formed on the semiconductor layer (2). The upper layer (6b) produces stress on the lowermost layer (6a), and both end sections of the lowermost layer (6a) bend upward from the semiconductor layer (2).

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Inventors:
SUMINO TASUKU (JP)
HISAKA TAKAYUKI (JP)
Application Number:
PCT/JP2017/007350
Publication Date:
August 30, 2018
Filing Date:
February 27, 2017
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP (JP)
International Classes:
H01L21/338; H01L29/812
Foreign References:
JPS57106080A1982-07-01
JPH10177967A1998-06-30
JPH04245444A1992-09-02
JP2003007726A2003-01-10
Attorney, Agent or Firm:
TAKADA, Mamoru et al. (JP)
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