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Patent Searching and Data


Title:
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2019/087341
Kind Code:
A1
Abstract:
The present invention provides a semiconductor device, a MOSFET 100, provided with: a semiconductor substrate 110 in which a super junction structure is formed in an n-type column region 113 and a p-type column region 115; and a gate electrode 122 formed on a first main surface side of the semiconductor substrate 110 with a gate insulation film 120 therebetween, wherein, in the n-type column region 113 and the p-type column region 115, crystal defects, the density of which is locally increased when viewed along the depth direction, are generated, and when the depth to the deepest portion of the super junction structure from the first main surface is Dp, the depth at which the density of crystal defect shows the maximum value is Dd, and the half-value width of the density distribution of the crystal defects is W, 0.25 Dp ≦ Dd <0.95 Dp and 0.05 Dp

Inventors:
ARAI DAISUKE (JP)
KITADA MIZUE (JP)
ASADA TAKESHI (JP)
SUZUKI NORIAKI (JP)
MURAKAMI KOICHI (JP)
Application Number:
PCT/JP2017/039640
Publication Date:
May 09, 2019
Filing Date:
November 01, 2017
Export Citation:
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Assignee:
SHINDENGEN ELECTRIC MFG (JP)
International Classes:
H01L29/78; H01L21/336
Domestic Patent References:
WO2010024433A12010-03-04
Foreign References:
JP2015018913A2015-01-29
JP2017183419A2017-10-05
Attorney, Agent or Firm:
MATSUO, Nobutaka (JP)
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