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Patent Searching and Data


Title:
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2019/163580
Kind Code:
A1
Abstract:
Provided are: a semiconductor device wherein characteristics are improved; and a method for manufacturing the semiconductor device. The semiconductor device is provided with: a substrate having a first surface, and a second surface positioned on the reverse side of the first surface; a first element that is provided on the first surface side; and a first resin layer, which is provided on the first surface side, and which is provided around the first element in a planar view. The substrate has a wiring layer. The first element has: a semiconductor layer; an electrode section positioned on the semiconductor layer surface side facing the substrate; and an insulating layer positioned on the reverse side of the electrode section by having the semiconductor layer therebetween. The electrode section is connected to the wiring layer. The height of the first resin layer from the first surface is more than that of the first element from the first surface.

Inventors:
YAMAMOTO, Teiji (10-1, Higashikotari 1-chome, Nagaokakyo-sh, Kyoto 55, 〒6178555, JP)
AOIKE, Masayuki (10-1, Higashikotari 1-chome, Nagaokakyo-sh, Kyoto 55, 〒6178555, JP)
NAGAI, Hiroyuki (10-1, Higashikotari 1-chome, Nagaokakyo-sh, Kyoto 55, 〒6178555, JP)
Application Number:
JP2019/004853
Publication Date:
August 29, 2019
Filing Date:
February 12, 2019
Export Citation:
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Assignee:
MURATA MANUFACTURING CO., LTD. (10-1, Higashikotari 1-chome Nagaokakyo-sh, Kyoto 55, 〒6178555, JP)
International Classes:
H01L23/28; H01L23/29; H01L23/31; H01L25/065; H01L25/07; H01L25/18
Attorney, Agent or Firm:
SAKAI INTERNATIONAL PATENT OFFICE (Toranomon Mitsui Building, 8-1 Kasumigaseki 3-chome, Chiyoda-k, Tokyo 13, 〒1000013, JP)
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