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Patent Searching and Data


Title:
SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SAME
Document Type and Number:
WIPO Patent Application WO/2024/084778
Kind Code:
A1
Abstract:
The present invention achieves a high withstand voltage by means of an outer peripheral region having a small width. A semiconductor device according to the present invention comprises: a semiconductor substrate that has an element region and an outer peripheral region; and an upper electrode that is in contact with the upper surface of the semiconductor substrate within the element region. The element region has: a p-type main region which is in contact with the upper electrode; and an n-type element drift region which is positioned below the main region. The outer peripheral region has: a plurality of p-type guard rings which annularly extend so as to multiply surround the element region when the semiconductor substrate is viewed from above; a plurality of n-type interval regions which are disposed between the guard rings; and an n-type outer peripheral drift region which is continuous with the element drift region, while being positioned below the plurality of guard rings and the plurality of interval regions. At least one of the plurality of interval regions is a high-concentration interval region which has a higher n-type impurity concentration than the element drift region.

Inventors:
HIRABAYASHI YASUHIRO (JP)
TAKEUCHI YUICHI (JP)
Application Number:
PCT/JP2023/028484
Publication Date:
April 25, 2024
Filing Date:
August 03, 2023
Export Citation:
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Assignee:
DENSO CORP (JP)
International Classes:
H01L29/78; H01L21/336; H01L29/06; H01L29/12; H01L29/739
Domestic Patent References:
WO2014087522A12014-06-12
WO2013046908A12013-04-04
Foreign References:
JP2018098324A2018-06-21
JP2016225455A2016-12-28
JP2022106210A2022-07-19
JP2013038329A2013-02-21
JPH08167715A1996-06-25
JP2021027138A2021-02-22
JP2018022851A2018-02-08
JP2014232838A2014-12-11
JP2019054087A2019-04-04
Attorney, Agent or Firm:
KAI-U PATENT LAW FIRM (JP)
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