Title:
SEMICONDUCTOR DEVICE AND METHOD FOR TESTING THE SAME
Document Type and Number:
WIPO Patent Application WO/2004/057353
Kind Code:
A1
Abstract:
A semiconductor device wherein a simple circuit arrangement is used to shorten the test time and suppress increase of circuit area required for the test. The semiconductor device (10) has a micro-memory (11) consolidated with a logic part. The micro-memory (11) includes an operation control circuit (12) for executing data read/write operations in accordance with input signals including addresses, data and commands. A storage area of the micro-memory (11) that is selected by an address includes a test register (16) for storing data used for selecting a test mode. A write circuit (15) produces, in response to a write command supplied from the operation control circuit (12), a control signal (RGT) for permitting an operation of writing data into the test register (16).
Inventors:
FURUYAMA TAKAAKI (JP)
Application Number:
PCT/JP2003/016156
Publication Date:
July 08, 2004
Filing Date:
December 17, 2003
Export Citation:
Assignee:
FUJITSU LTD (JP)
FURUYAMA TAKAAKI (JP)
FURUYAMA TAKAAKI (JP)
International Classes:
G01R31/28; G01R31/317; G01R31/319; H01L21/822; H01L27/04; (IPC1-7): G01R31/28
Foreign References:
| JPH11297100A | 1999-10-29 | |||
| JP2001312900A | 2001-11-09 | |||
| US5825712A | 1998-10-20 |
Other References:
See also references of EP 1574867A4
Attorney, Agent or Firm:
Onda, Hironori (Ohmiya-cho 2-chome Gifu-shi, Gifu, JP)
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