SEMICONDUCTOR DEVICE AND PRODUCTION METHOD THEREOF

Title:

SEMICONDUCTOR DEVICE AND PRODUCTION METHOD THEREOF

Document Type and Number:

WIPO Patent Application WO/1998/013881

Kind Code:

A1

Abstract:

A high withstand voltage semiconductor device, such as a gate turn-off thyristor, in which the surface field concentration at a main P-N junction is reduced. The semiconductor device comprises a low resistance layer (2) of a first conductivity type, a high resistance layer (1) of the first conductivity type disposed adjacent to the low resistance layer (2), and a low resistance layer (3) of a second conductivity type disposed adjacent to the high resistance layer (1) of the first conductivity type in such a manner as to interpose the high resistance layer (1) between the layers (2) and (3). The semiconductor device is flat, and its edges are beveled through the layers (2) and (1) on one side and through the layers (3) and (1) on the other side to increase section areas. The outer ends of the bevels (9, 11) are chamfered (10, 12) or given a predetermined radius of curvature.

Inventors:

TOKUNOH FUTOSHI (JP)
TANAKA YASUO (JP)
SAKAMOTO TOKUMITSU (JP)
NAKASIMA NOBUHISA (JP)

Application Number:

PCT/JP1996/002741

Publication Date:

April 02, 1998

Filing Date:

September 24, 1996

Export Citation:

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Assignee:

MITSUBISHI ELECTRIC CORP (JP)
TOKUNOH FUTOSHI (JP)
TANAKA YASUO (JP)
SAKAMOTO TOKUMITSU (JP)
NAKASIMA NOBUHISA (JP)

International Classes:

H01L29/06; H01L29/74; H01L29/744; (IPC1-7): H01L29/744

Foreign References:

JPS4522858B1
JPS5944869A	1984-03-13
JPS54127686A	1979-10-03
JPS464539B1

Other References: