Title:
SEMICONDUCTOR DEVICE AND PRODUCTION METHOD
Document Type and Number:
WIPO Patent Application WO/2018/163839
Kind Code:
A1
Abstract:
The present technique relates to a semiconductor device and a production method, which enable decrease of PID. The present technique provides a semiconductor device which comprises: a first layer; a second layer that is laminated on the first layer; a conductive member which is in contact with the lateral surface of a groove part that is formed in the first layer and the second layer; and a first wiring line which is formed on the second layer and is in contact with the bottom surface of the groove part. The conductive member is connected to a protection element for discharging charges that are stored within the groove part. The present technique is applicable, for example, when a via is processed with respect to a silicon substrate and an interlayer film that are laminated one upon another.
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Inventors:
MIYAKE SHINICHI (JP)
Application Number:
PCT/JP2018/006416
Publication Date:
September 13, 2018
Filing Date:
February 22, 2018
Export Citation:
Assignee:
SONY SEMICONDUCTOR SOLUTIONS CORP (JP)
International Classes:
H01L21/3205; H01L21/768; H01L21/822; H01L23/522; H01L27/04
Foreign References:
| JP2006294719A | 2006-10-26 | |||
| JP2016197759A | 2016-11-24 | |||
| JP2008210952A | 2008-09-11 | |||
| JP2011086850A | 2011-04-28 | |||
| JP2000216259A | 2000-08-04 |
Attorney, Agent or Firm:
NISHIKAWA Takashi et al. (JP)
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