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Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2010/113779
Kind Code:
A1
Abstract:
The both ends of each of the gate fingers are connected to the same gate bus bar. The both ends of each of a plurality of source electrodes are grounded. The source electrodes and a plurality of drain electrodes are alternately disposed one by one, and another gate fingers are disposed between the source electrodes and the drain electrodes. The drain electrodes are connected by means of an air bridge provided over the source electrode and the two gate fingers sandwiched between the drain electrodes. A ladder circuit is connected to the gate bus bar in parallel to the gate fingers, and loop oscillation conditions are adjusted.

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Inventors:
MATSUNAGA KOJI (JP)
Application Number:
PCT/JP2010/055321
Publication Date:
October 07, 2010
Filing Date:
March 26, 2010
Export Citation:
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Assignee:
NEC CORP (JP)
MATSUNAGA KOJI (JP)
International Classes:
H01L21/338; H01L21/768; H01L21/822; H01L21/8232; H01L23/522; H01L27/04; H01L27/06; H01L29/417; H01L29/423; H01L29/49; H01L29/778; H01L29/812
Foreign References:
JPH04125941A1992-04-27
JPS5255476A1977-05-06
JPH07142512A1995-06-02
JP2009054632A2009-03-12
JP2000294568A2000-10-20
JPH10233404A1998-09-02
JP2007060458A2007-03-08
JP2001024148A2001-01-26
JPH04302149A1992-10-26
JPH07226488A1995-08-22
Attorney, Agent or Firm:
KUDOH Minoru (JP)
Minoru Kudo (JP)
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