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Patent Searching and Data


Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2013/057785
Kind Code:
A1
Abstract:
The problem addressed by the present invention is to provide a static memory cell using a surrounding gate transistor (SGT) which is highly integrated and ensures stable operation. A six transistor SRAM cell comprises: a first driver transistor constituted by an SGT having a first gate electrode made of at least a metal that is formed on the periphery of a first gate insulating film; a first selection transistor constituted by an SGT having a second gate electrode made of at least a metal that is formed on the periphery of a second gate insulating film; a first load transistor constituted by an SGT having a third gate electrode made of at least a metal that is formed on the periphery of a third gate insulating film; and a first gate wire connected to said second gate electrode. The perimeter of an island-shaped semiconductor layer of said driver transistor is less than two times of the perimeter of the island-shaped semiconductor layer of the selection transistor and the voltage applied to the second gate electrode is lower than the voltage applied to a first conductive type high-concentration semiconductor layer at the upper portion of the island-shaped semiconductor layer of the selection transistor, thereby solving the above problem.

Inventors:
MASUOKA FUJIO (JP)
NAKAMURA HIROKI (JP)
ARAI SHINTARO (JP)
Application Number:
PCT/JP2011/073885
Publication Date:
April 25, 2013
Filing Date:
October 18, 2011
Export Citation:
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Assignee:
UNISANTIS ELECT SINGAPORE PTE (SG)
MASUOKA FUJIO (JP)
NAKAMURA HIROKI (JP)
ARAI SHINTARO (JP)
International Classes:
H01L21/8244; G11C11/413; H01L27/11
Domestic Patent References:
WO2009060934A12009-05-14
WO2009096465A12009-08-06
Foreign References:
JP2008205168A2008-09-04
JP2008065968A2008-03-21
JP2005038557A2005-02-10
JP2007066493A2007-03-15
JPH0951042A1997-02-18
Attorney, Agent or Firm:
TSUJII Koichi et al. (JP)
辻居 Koichi (JP)
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Claims: