Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2014/181819
Kind Code:
A1
Abstract:
Provided is a semiconductor device with which the impact of optical proximity effects in lithography can be avoided and the ease of forming a contact hole can be ensured. A semiconductor device having one parallel transistor for connecting in parallel a plurality of vertical transistors disposed in an active region on a semiconductor substrate, wherein the parallel transistor is constituted of: a plurality of semiconductor pillars that project out in a direction perpendicular to a main surface of the semiconductor substrate; a lower diffusion layer that is disposed below the plurality of semiconductor pillars; a plurality of upper diffusion layers that are each disposed on an upper section of the plurality of semiconductor pillars; and gate electrodes disposed, with a gate insulator film therebetween, on the entire side surfaces of the plurality of semiconductor pillars. The plurality of upper diffusion layers are connected to one upper contact plug that is disposed over the plurality of upper diffusion layers.
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Inventors:
TAKAISHI YOSHIHIRO (JP)
Application Number:
PCT/JP2014/062331
Publication Date:
November 13, 2014
Filing Date:
May 08, 2014
Export Citation:
Assignee:
PS4 LUXCO SARL (LU)
TAKAISHI YOSHIHIRO (JP)
TAKAISHI YOSHIHIRO (JP)
International Classes:
H01L21/8234; H01L21/336; H01L27/088; H01L29/78
Domestic Patent References:
| WO2009095997A1 | 2009-08-06 |
Foreign References:
| JP2009081389A | 2009-04-16 | |||
| JP2012023305A | 2012-02-02 | |||
| JPH02188966A | 1990-07-25 |
Attorney, Agent or Firm:
IKEDA, Noriyasu et al. (JP)
Noriyasu Ikeda (JP)
Noriyasu Ikeda (JP)
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