Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2016/157412
Kind Code:
A1
Abstract:
This semiconductor device is provided with an SRAM circuit. The SRAM circuit includes: a memory array (11) wherein a plurality of memory cells (MC) are disposed in matrix; ground wiring (ARVSS) to which the memory cells (MC) are connected in common; and a first potential control circuit (16) for controlling the potential of the ground wiring (ARVSS) in accordance with operation mode. The first potential control circuit (16) includes a first NMOS transistor (NM10) and a first PMOS transistor (PM10), which are connected in parallel to each other between the ground wiring (ARVSS) and a ground node (VSS) that supplies a ground potential.
Inventors:
SAWADA YOHEI (JP)
YABUUCHI MAKOTO (JP)
ISHII YUICHIRO (JP)
YABUUCHI MAKOTO (JP)
ISHII YUICHIRO (JP)
Application Number:
PCT/JP2015/060133
Publication Date:
October 06, 2016
Filing Date:
March 31, 2015
Export Citation:
Assignee:
RENESAS ELECTRONICS CORP (JP)
International Classes:
G11C11/412; G11C11/41; G11C11/413
Foreign References:
| JP2007250586A | 2007-09-27 | |||
| JP2011091324A | 2011-05-06 | |||
| JP2013254548A | 2013-12-19 | |||
| JP2004206745A | 2004-07-22 |
Attorney, Agent or Firm:
Fukami Patent Office, p. c. (JP)
Patent business corporation Fukami patent firm (JP)
Patent business corporation Fukami patent firm (JP)
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