Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2018/029951
Kind Code:
A1
Abstract:
The present invention relates to a semiconductor device and comprises a semiconductor substrate and a semiconductor layer arranged thereon. The semiconductor layer has a first conductivity type first pillar layer and a second conductivity type second pillar layer provided so as to extend from the main surface of the semiconductor layer opposite the semiconductor substrate toward the semiconductor substrate to a predetermined depth. The first and second pillar layers are alternately arranged in a direction parallel to the main surface in an active region of the semiconductor layer and a termination region surrounding the active region. The pillar pitch defined by the total width of one group of the first and second pillar layers in the termination region is greater than the pillar pitch defined by the total width of one group of the first and second pillar layers in the active region. The effective impurity concentrations of the first and second conductivity type impurities within the pillar pitches are equal in the active region and termination region.
Inventors:
FURUHASHI MASAYUKI (JP)
EBIHARA KOHEI (JP)
EBIHARA KOHEI (JP)
Application Number:
PCT/JP2017/020604
Publication Date:
February 15, 2018
Filing Date:
June 02, 2017
Export Citation:
Assignee:
MITSUBISHI ELECTRIC CORP (JP)
International Classes:
H01L29/06; H01L21/336; H01L29/12; H01L29/78
Foreign References:
| JP2006186108A | 2006-07-13 | |||
| JP2007207784A | 2007-08-16 | |||
| JP2000277726A | 2000-10-06 | |||
| JP2001298190A | 2001-10-26 |
Attorney, Agent or Firm:
YOSHITAKE Hidetoshi et al. (JP)
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