Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2018/042707
Kind Code:
A1
Abstract:
According to the present invention, a contact layer comprising a material with an electron concentration of less than 1 × 1022 cm-3 is directly provided on a surface of a semiconductor crystal of an n-type conductivity with a band gap at room temperature of not more than 1.2 eV. In this way, the wave function penetration from the contact layer side to the semiconductor surface side is suppressed, and, as a result, the generation of a barrier φB due to the Fermi level pinning phenomenon can be suppressed, and a lower resistivity and more highly ohmic contact can be achieved.
Inventors:
TORIUMI AKIRA (JP)
NISHIMURA TOMONORI (JP)
NISHIMURA TOMONORI (JP)
Application Number:
PCT/JP2017/006776
Publication Date:
March 08, 2018
Filing Date:
February 23, 2017
Export Citation:
Assignee:
JAPAN SCIENCE & TECH AGENCY (JP)
International Classes:
H01L21/28; H01L21/336; H01L29/417; H01L29/78
Domestic Patent References:
| WO2013133060A1 | 2013-09-12 |
Foreign References:
| JP2009059996A | 2009-03-19 |
Other References:
HUAN DA WU ET AL.: "Ohmic Contact to n-Type Ge With Compositional W Nitride", IEEE ELECTRON DEVICE LETTERS, vol. 35, no. 12, 28 October 2014 (2014-10-28), pages 1188 - 1190, XP011564988, DOI: doi:10.1109/LED.2014.2365186
SHIH-CHIEH TENG ET AL.: "Fermi Level Depinning on n-Epitaxial GeSn by Yb Stanogermanide Formation With Low-Contact Resistivity", IEEE ELECTRON DEVICE LETTERS, vol. 37, no. 9, 14 July 2016 (2016-07-14), pages 1207 - 1210, XP011620342, DOI: doi:10.1109/LED.2016.2591620
K. KAKUSHIMA ET AL.: "A Low Temperature Ohmic Contact Process for n-type Ge Substrate", EXT ABS. THE 13TH INTERNATIONAL WORKSHOP ON JUNCTION TECHNOLOGY 2013, 6 June 2013 (2013-06-06), pages 35 - 36, XP032514231, DOI: doi:10.1109/IWJT.2013.6644500
SHIH-CHIEH TENG ET AL.: "Fermi Level Depinning on n-Epitaxial GeSn by Yb Stanogermanide Formation With Low-Contact Resistivity", IEEE ELECTRON DEVICE LETTERS, vol. 37, no. 9, 14 July 2016 (2016-07-14), pages 1207 - 1210, XP011620342, DOI: doi:10.1109/LED.2016.2591620
K. KAKUSHIMA ET AL.: "A Low Temperature Ohmic Contact Process for n-type Ge Substrate", EXT ABS. THE 13TH INTERNATIONAL WORKSHOP ON JUNCTION TECHNOLOGY 2013, 6 June 2013 (2013-06-06), pages 35 - 36, XP032514231, DOI: doi:10.1109/IWJT.2013.6644500
Attorney, Agent or Firm:
OHNO Seiji et al. (JP)
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