Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2018/235135
Kind Code:
A1
Abstract:
[Problem] To provide a semiconductor device which has a bypass capacitor and a power supply circuit, and is capable of preventing erroneous operation of the power supply circuit. [Solution] A semiconductor device 1 equipped with an insulating substrate 2, conductive pattern sections 51, 52, 53, 54, 55 formed on the insulating substrate, semiconductor switching units 10, 20, and a bypass capacitor 80, wherein the semiconductor switching unit 10 is positioned on the conductive pattern section 51, the semiconductor switching unit 20 is positioned on the conductive pattern section 52, the semiconductor switching unit 10 has a side S1 and a side S2, the semiconductor switching unit 20 has a side S3 and a side S4, and a virtual line L1 extending along the side S1 crosses a virtual line L2 extending along the side S3.
Inventors:
MORINAGA YUJI (JP)
KYUTOKU ATSUSHI (JP)
KIKUCHI YOSHIHIKO (JP)
KYUTOKU ATSUSHI (JP)
KIKUCHI YOSHIHIKO (JP)
Application Number:
PCT/JP2017/022564
Publication Date:
December 27, 2018
Filing Date:
June 19, 2017
Export Citation:
Assignee:
SHINDENGEN ELECTRIC MFG (JP)
International Classes:
H01L25/07; H01L25/18
Domestic Patent References:
| WO2015040727A1 | 2015-03-26 | |||
| WO2013046824A1 | 2013-04-04 |
Foreign References:
| JPS62150871A | 1987-07-04 | |||
| JP2011243808A | 2011-12-01 | |||
| JP2009088466A | 2009-04-23 | |||
| JP2001332679A | 2001-11-30 | |||
| JP2016162773A | 2016-09-05 |
Other References:
See also references of EP 3644360A4
Attorney, Agent or Firm:
NAGAI Hiroshi et al. (JP)
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