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Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2019/111755
Kind Code:
A1
Abstract:
The purpose of the present invention is to provide a semiconductor device which cools an electronic component and a semiconductor module inside a housing. The semiconductor device is equipped with: a heat sink which includes a fin and a plate-shaped base part, has a semiconductor module provided on one surface of the base part, and has the fin provided on the other surface thereof; a housing which covers the one surface of the base part, the semiconductor module, an electronic component, and a circuit substrate, is attached to the base part, and houses the semiconductor module between the housing and the one surface of the base part; a fan for cooling the fin; and a first ventilation port and a second ventilation port which both connect the interior and exterior of the housing. The first ventilation port is provided above the height which is half the tallest height from the circuit substrate of the electronic component mounted to one surface of the circuit substrate inside the housing. The second ventilation port penetrates from the one surface to the other surface of the base part inside the housing. The first ventilation port and the second ventilation port form a ventilation channel inside the housing. The wind speed of the cooling wind on the one surface of the circuit substrate is slower than the wind speed of the cooling wind on the electronic component.

Inventors:
SATO MASAKI (JP)
SHIRAKATA YUJI (JP)
SUZUKI NORIHIRO (JP)
MURATA SHINJI (JP)
Application Number:
PCT/JP2018/043527
Publication Date:
June 13, 2019
Filing Date:
November 27, 2018
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP (JP)
International Classes:
H01L23/467; H01L25/07; H01L25/18; H05K7/20
Foreign References:
JPS62120398U1987-07-30
JP2008078423A2008-04-03
JP2011138960A2011-07-14
JP2004281484A2004-10-07
JP2011061201A2011-03-24
JP2013093364A2013-05-16
JPH10200282A1998-07-31
JP2007043011A2007-02-15
Attorney, Agent or Firm:
YOSHITAKE Hidetoshi et al. (JP)
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