Title:
SEMICONDUCTOR ELEMENT AND METHOD FOR MANUFACTURING SAME
Document Type and Number:
WIPO Patent Application WO/2018/150971
Kind Code:
A1
Abstract:
Provided is a semiconductor element having an electroless plating layer formed on an electrode on least one side of double-sided conductive substrate having a front side electrode and a back side electrode, wherein the electroless plating layer has an electroless nickel-phosphorus plating layer and an electroless gold plating layer formed on the electroless nickel-phosphorus plating layer, is a surface to be soldered, and has a plurality of depressions formed in the surface thereof.
Inventors:
SUNAMOTO MASATOSHI (JP)
UENO RYUJI (JP)
UENO RYUJI (JP)
Application Number:
PCT/JP2018/004171
Publication Date:
August 23, 2018
Filing Date:
February 07, 2018
Export Citation:
Assignee:
MITSUBISHI ELECTRIC CORP (JP)
International Classes:
C23C18/26; C23C18/42; H01L21/288; H01L21/52; H01L29/861; H01L29/868
Domestic Patent References:
| WO2016163319A1 | 2016-10-13 |
Foreign References:
| JP2005051084A | 2005-02-24 |
Attorney, Agent or Firm:
SOGA, Michiharu et al. (JP)
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