1. Semiconductor installation, executed that way, that it contains a semiconductor substrate transfer/processing tunnel-arrangement and thereby during the operation of this bunnel-arrangement the at-least almost continuously

taking place of an at-least almost uninterruptedly

displacing therethrough of successive, joining semiconductor substrate-sections on behalf of the therein taking place of also a series of semiconductor processings thereof.

2. Semiconductor installation according to Claim 1, characterized, that it in addition is executed such and containing such means, that thereby in this semiconductor tunnel-arrangement the taking place of such a great number of semiconductor processings of these successive substrate- sections, that in a behind thereof located device by means of separation thereof the accomplishing of semiconductor chips .

3. Semiconductor installation according to one of the foregoing Claims, characterized that way, that it is executed such, that thereby the width of such semiconductor tunnel-arrangement thereof is less than 2 meters.

A. Semiconductor installation according to one of the foregoing Claims, characterized that way, that thereby such a therein located tunnel-arrangement at-least also

contains successive semiconductor processing-sections on behalf of the therein during its operation the uninterruptedly taking place of successive semiconductor processings of the successive substrate-sections, uninterruptedly displacing therethrough.

5. Semiconductor installation according to Claim 4, characterized that way, that it is further executed such and containing such means, that thereby in such tunnel- arrangement thereof the at-least almost uninterruptedly displacing therethrough of successive sections of an uninterrupted folio as an at-least temporary semiconductor underlayer of these successive semiconductor substrate- sections .

6. Semiconductor installation according to Claim 5, characterized that way and further executed such, that this folio consists of at-least one substance on behalf of its functioning as such an at-least temporary semiconductor underlayer.

7. Semiconductor installation according to Claim 6, characterized that way and further is executed such, that this folio thereby at-least consists of a metallic

substance.

8. Semiconductor installation according to Claim 6, characterized that way and executed such, that this folio thereby at-least also consists of a synthetic substance.

9. Semiconductor installation according to one of the foregoing Claims, characterized that way and containing further such means, that thereby in a device behind the therein located semiconductor tunnel-arrangement by means of dividing these successive semiconductor substrate- sections the establishing of semiconductor chips with such a semiconductor underlayer thereof.

10. Semiconductor installation according to Claim 6, characterized that way and further containing sych means, that thereby in a device behind the therein located

semiconductor tunnel-arrangement by means of dividing these successive semiconductor substrate-sections the accompli- shing of semiconductor chips with at-least a synthetic underlayer and a di-electric toplayer.

11. Semiconductor installation according to one of the foregoing Claims, characterized that way and further executed such, that thereby the thickness of such folio is less than 0,2 mm.

12. Semiconductor installation according to Claim 11, characterized that way and further is executed such, that thereby the tunnel-passage of such semiconductor tunnel- arrangement only to a small extent is wider than the breadth of such folio.

13. Semiconductor installation according to one of the foregoing Claims, characterized that way and further executed such, that thereby the application of a folio with at-least almost parallel upward sidewalls thereof.

14. Semiconductor installation according to one of the foregoing Claims, characterized that way and further is executed such, that thereby therein the location of a device on behalf of the availability of such a very long folio, that during a very long time an uninterrupted lineair displacement of the successive sections is taking place through such semiconductor tunnel-arrangement.

15. Semiconductor installation according to Claim 14, characterized that way and further is executed such, that thereby the application of a folio storage-roll .

16. Semiconductor installation according to one of the foregoing Claims, characterized that way and containing such means, that thereby the duration of time of such an uninterrupted displacement of these successive folio- sections through almost all semiconductor processing- sections of such semiconductor tunnel-arrangement amounts at-least 2 months.

17. Semiconductor installation according to one of the foregoung Claims, characterized that way and containing such means, that thereby the velocity of displacement of the successive substrate-sections through such semiconductor tunnel-arrangement is less than 3 mm per second.

18. Semiconductor installation according to one of the foregoing Claims, characterized that way and further is executed such, that thereby such semiconductor tunnel- arrangement, containing at-least also an upper- and lower- tunnelblock, uninterruptedly extends in the lineair

displacement-direction of these successive semiconductor substrate-sections, displacing therethrough.

19. Semiconductor installation according to Claim 18, characterized that way and further containing such means, that thereby the passage-way of such semiconductor

tunnel-arrangement for the successive semiconductor

substrate-sections, displacing therethrough during its operation, only at the entrance- and exit-side thereof is in an open connection with the atmospheric outer air under the appliance of a gaseous medium-lock at at-least the entrance-side thereof.

20. Semiconductor installation according to one of the foregoing Claims, characterized that way and further is executed such, that thereby behind the exit of the therein located semiconductor tunnel-arrangement the insertion of a device on behalf of therein at-least by means of

dividing the successive, therein uninterruptedly displacing semiconductor processed semiconductor substrate-sections the accomplishing of semiconductor chips.

21. Semiconductor installation according to one of the foregoing Claims, characterized that way and further containing such means, that thereby therein the taking place of government of at-least also the successive semiconductor processings in such a semiconducor tunnel- arrangement and the therein located semiconductor substrate transfer-system on behalf of an at-least almost uninterrupted uniform displacement of the successive semiconductor substrate-sections therethrough.

22. Semiconductor installation according to Claim 21, characterized that way and further containing such means, that thereby for that purpose in at-least the end-section of such tunnel-arrangement the continuously exercising of a tractive-power upon the successive semiconductor

substrate-sections, displacing therethrough.

23. Semiconducror installation according to one of the foregoing Claims, characterized that way and further containing means on behalf of in the exit-section of such therein located semiconductor tunnel-arrangement at-least the also taking place of removal therefrom of the

successive folio-sections as a temporary semiconductor underlayer of the therein accomplished semiconductor substrate-sections .

24. Semiconductor installation according to Claim 23, characterized that way and thereto further containing such means, that thereby in the entrance-section of this semiconductor tunnel-arrangement the taking place of the application of a micro-high film of a fluidic stitch- substance, with a high boiling-temperature thereof on behalf of the temporary in this tunnel-arrangement

taking place of a temporary anchorage upon this folio of the successive, therein accomplished semiconductor

substrate-sections.

25. Semiconductor installation as in one of the foregoing Claims, characterized that way and further executed such, that for that purpose in the exit-section of this semiconductor tunnel-arrangement the location of a

discharge-roll on behalf of the displacement in at-least downward direction of the from the in a lineair direction displacing semiconductor substrate-sections successively removed folio-sections.

26. Semiconductor installation according to Claim 25, characterized in that way, that thereby in a device behind this roll-arrangement by means of dividing of the removed semiconductor substrate-sections the accomplishing of semiconductor chips with typically a di-electric under- layer thereof.

27. Semiconductor installation according to Claim 25, characterized. that way and further executed such, that it also contains a storage-roll for these successively removed folio-sections, with in-between this discharge- roll arrangement and this storage-roll arrangement the location of a cleaning device for these successive folio- sections, displacing therethrough.

28. Semiconductor installation according to Claim 25, characterized in that way and further executed such, that thereby therein the location of a roll-arrangement at the entrance-side of such semiconductor tunnel-arrangement on behalf of the thereby functioning of the successive, uninterruptedly through this tunnel-arrangement displacing folio-sections as an uninterrupted semiconductor support/ transfer-band.

29. Semiconductor installation according to Claim 28, characterized that way and further executed such, that as thereby underneath this tunnel-arrangement in-between these two roll-arrangements at-least also the insertion of a cleaning-device on behalf of the therein taking place of cleaning these successive semiconductor band-sections, uninterruptedly displacing therethrough.

30. Semiconductor installation according to Claim 29, characterized in that way and further containing such means, that thereby during the operation of this tunnel- arrangement this metallic semiconductor substrate support/ transfer-band functioning on behalf of the therewith displacing of successive semiconductor substrate-sections through this tunnel-arrangement as a temporary semiconductor under- layer of these successive semiconductor substrate-sections.

31. Semiconductor installation according to Claim 30, characterized that way and further executed such, that thereby the central semiconductor processing-section of this band has been deepened on behalf of the therein during the operation thereof at-least the taking place of

erection of successive semiconductor substrate-sections.

32. Semiconductor installation according to Claims 30/31 , characterized in that way and further executed such, that thereby underneath this tunnel-arrangement between these two roll-arrangements behind the therein located cleaning- device on behalf of the cleaning of the successive,

uninterruptedly displacing semiconductor band-sections theretrough, the location of a device on behalf of at at- least the central semiconductor processing-section thereof establishing of a micrometer high film of a fluidic high- boiling stitchsubstance on behalf of the during the

displacing of the successive sections of the substrate support/transfer-band through this tunnel-arrangement thereby to a sufficient degree such an at-least temporary anchorage thereupon of the therein established successive semiconductor substrate-sections, that in a device behind this tunnel-arrangement the possible taking place of

separation of these successive semiconductor substrate- sections from the successive band-sections.

33. Semiconductor installation according to Claim 32, characterized in that way and further containing such means, that thereby in this semiconductor tunnel-arrangement in its begin-section upon this layer of such a temporary stitch-substance the taking place of establishing a

semiconductor underlayer for these successive semiconductor substrate-sections.

34. Semiconductor installation according to Claim 33, characterized in that way and in addition contains such means, that thereby for this semiconductor underlayer the possible appliance of any thereto suitable semiconductor substance.

35. Semiconductor installation according to Claim 34, characterized in that way and in addition containing such means, that thereby for these substances of the semiconductor underlayer the appliance of the combination of a

number of upon each other located together-stitched

semiconductor layers, consisting of at-least also additional semiconductor substances.

36. Semiconductor installation according to Claim 35, characterized in that way and consisting of such means, that thereby for this underlayer in this semiconductor tunnel- arrangement the establishing of a micrometer high dielectric substance.

37. Semiconductor installation according to Claim 35, characterized in that way and further containing such means, that thereby for this underlayer in this semiconduc- tor tunnel-arrangement the establishing of a micrometer high metallic substance.

38. Semiconductor installation according to one of the foregoing Claims, characterized in that way and containing such means, that thereby near the entrance of the therein located semiconductor tunnel-arrangement the location of a storage-roll for the temporary storage of a very long folio, with during the operation of the tunnel-arrangement the uninterruptedly taking place- of at the entrance-side

thereof applying of successive folio-sections as an at- least temporary semiconductor underlayer of these ·

successive, therethrough displacing semiconductor substrate sections, upon the central semiconductor processing- section of the successive, already uninterruptedly semiconductor substrate suppor t/transfer-bandsec t ions .

39. Semiconductor installation according to Claim 38, characterized that way and further containing such means, that thereby the material for this folio consists of at- least a synthetic substance.

40. Semiconductor installation according to Claim 38, characterized that way and further containing such means, that thereby the material for this folio at-least also consists of a soft metallic substance.

41. Semiconductor installation according to one of the foregoing Claims, characterized in that way and in

addition containing such means, that this folio thereby consists of a number of different semiconductot substances.

42. Semiconductor installation according to one of the foregoing Claims, characterized in that way and in

addition contains such means, that thereby in the entrance- section of the therein located semiconductor tunnel- arrangement the uninterruptedly taking place of the

establishing of a number of upon each other located

micrometer high di-electrical substances upon the successive semiconductor folio-sections, uninterruptedly

displacing therethrough.

43. semiconductor installation according to Claim 42, characterized that way and further executed such, that thereby in thereupon following strip-shaped upper

semiconductor processing split-sections at the central semiconductor processing-section of this tunnel- arrangement the thereupon taking place of all following establishings of semiconductor layers and primary

semiconductor processings to accomplish such successive semiconductor substrate-sections, that out of that in a device behind the exit thereof by means of dividing of these substrate-sections the establishing of semiconductor chips .

44. Semiconductor installation according to Claim 43, characterized that way and in addition contains such means, that thereby under the application of such an uninterrupted semiconductor substrate support/transfer-band the thereupon accomplished bottom-layer not to such extent is stitched thereupon, that thereby after all these having taken place successive semiconductor establishings and

- processings in this device the taking place of

separation of the semiconductor top-layer, including this semiconductor bottom-layer, as successive semiconductor substrate-sections from this band, after-which by means of dividing this semiconductor top-layer the accomplishing of semiconductor chips with this di-electric bottom- layer.

45. Semiconductor installation according to Claim 38, characterized that way and further is executed such, that thereby the vertical sidewalls of such deepened flat upperwall-section of this band, as seen in both the

length- as height-direction, also at-least almost are flat and these sidewalls also are almost parallel with both upward sidewalls of this band.

46. Semiconductor installation according to Claim 45, characterized that way and further containing such means, that as thereby during the operation of this tunnel- arrangement the uninterruptedly displacing therethrough of the successive band-sections, with thereupon successive sections of an uninterrupted folio, the thereby maintaining of an at-least almost parallel position of the upward sidewalls of the folio-sections with the therewith

corresponding upward sidewalls of the tunnel-passage.

47. Semiconductor installation according to Claim 46, characterized that way and in addition containing such means, that thereby by means of successive flows of gasous medium along at-least also this folio, the uninterruptedly maintaining of the following:

a) conducting of this band along an upward sidewall of the tunnel-passage; and

b) reclining of the successive folio-sections with one

upward sidewall thereof against the therewith

corresponding upward sidewall of this deepened

upperwall-section of this band.

48. Semiconductor installation according to one of the foregoing Claims, characterized that way and containing such means, that thereby in the semiconductor tunnel-arrangement, contained therein, during the in a strip-chaped upper processing-section thereof uninterruptedly taking place of a heating-process of the semiconductor toplayer-section of the successive, uninterruptedly underneath thereof displacing substrate-sections, the preventage of an unallowable

deformation thereof in at-least its transverse direction.

49. Semiconductor installation according to Claim 48, characterized that way and containing such means, that thereby in such heating-processingsection in the lower wall of the uppertunnelblock the location of an electric strip- shaped heating-element, with a micrometer breadth thereof on behalf of the therewith during a very short time the heating of only mainly a micrometer high layer of an established semiconductor substance, as for instance a dielectric layer.

50. Semiconducror installation according to Claim 49, characterized that way and further executed such, that thereby in the length-direction beyond thereof in this block the location of an also strip-shaped cooling-section.

51. Semiconductor installation according to one of the foregoing Claims, characterized that way, executed such and containing such means, that thereby in such semiconduc- tor tunnel-arrangement thereof the uninterruptedly taking place of the establishing of at-least one semiconductor top-layer upon the semiconductor band-sections, during its operation uninterruptedly displacing therethrough, and whereby at-least also the following:

a) an allowable deformation thereof during such semiconductor processing-process; and

b) a small acceptable expansion of these successive

semiconductor substrate-sections in the length-direction of the tunnel-passage during their lineaair displace- ment therethrough.

52. Semiconductor installation according to Claim 51, characterized that way and executed such, that thereby this band a very thin semiconductor folio is.

53. Semiconductot installation according to Claim 51, tharacterized that way and further executed such, that thereby this band is such an uninterrupted metallic

semiconductor substrate support/transfer-band.

54. Semiconductor installation according to Claim 51, characterized that way and further executed such, that thereby for such successive semiconductor toplayer- section only the requirement of typically only one strip- shaped lightning-device to establish a lightning- pattern, if thereby the application of only one common semiconductor top-layer.

55. Semiconductor installation according to Claim 51, characterized that way and containing such means, that thereby in such semiconductor tunnel-arrangement thereof the accomplishing of a number of upon each other positioned semiconductor main layers, with in-between a dielectric layer, containing some metallic inner-connections therefor .

56. Semiconductor installation according to one of the foregoing Claims, characterized such and further containing such means, that thereby by means of a strip-shaped supply- device for a lightning-pattern, located in its upper- tunnelblock of the therein located semiconductor tunnel- arrangement, the taking place of the applying of a strip- shaped lightning-pattern upon the successive, underneath thereof displacing semiconductor substrate-sections.

57. Semiconductor installation according to Claim 56, characterized that way and further executed such, that thereby in both transverse ends of such semiconductor band or - folio the establishing of successive recesses on behalf of by means of this band or folio the also

displacing therewith of this apply ing-de vice of such lightning-pattern during the lightning-process.

58. Semiconductor installation according to one of the foregoing Claims, characterized that way and further containing such means, that thereby after the joining of another semiconductor folio with the back-side of the already through the semiconductor tunnel-arrangement displacing folio, thereafter upon at-least one place a stitch-connection in-between thereof is accomplished and on-which the use of any type of already commonly used stitch-method, as for instance the establishing of a weld-connection or melting-together of both folio-ends.

59. Semiconductor installation according to one of the foregoing Claims, characterized that way, further

executed such and containing such means, that in the therein located semiconductor tunnel-arrangement during its operation the taking place of all required semiconductor appliances of - substances and - processings of the successive semiconductor substrate-sections, uninterruptedly displacing therethrough, and after the displacement thereof out of this tunnel-arrangement . through its exit-side, in a thereafter located device-combination at- first the taking place of removal of this layer fluidic guidance-medium therefrom and thereupon therein the taking place of dividing of these successive semiconductor substrate-sections under the accomplishing of semiconduc- tor chips.

60. Semiconductor installation according to Claim 59, characterized that way, that it further contains such means, that as thereby in this tunnel-arrangement during its operation the therein taking place of an uninterrup- tedly displacing therethrough of a folio from a folio storage-roll, thereby the successive folio-sections functioning as a definite semiconductor bottom-layer of the therein established semiconductor substrate-sections and whereby in a device behind this tunnel-exit by means of at-least also a dividing thereof the accomplishing of semiconductor chips with a folio-part as their semiconductor bottom-layer.

61. Semiconductor installation according to Claim 59, characterized that way and further containing such means, that as thereby in this tunnel-arrangement during its operation the therein taking place of an uninterrupted displacement of an uninterrupted semiconductor folio, derived from a folio storage-roll, with thereupon at at-least the central semiconductor processing-section thereof in the begin-section of the tunnel-pasage the application thereupon of a micrometer high layer of a fluidic temporary stitch-medium and there-upon therein the taking place of the establishing of successive semiconductor substrate-sections, containing a di-electric bottom-layer thereof, with in the begin-section of the behind this tunnel-arrangement inserted device the

uninterruptedly taking place of removal in downward direction of the successive folio-sections together with a part of the temporary stitch-substance from the successive substate-sections , displacing therethrough, and in the end-section of this device by means of dividing the accomplishing of semiconductor chips with a di-electric bottom-layer thereof.

62. Semiconductor installation according to Claim 59, characterized that way and further containing such means, that as in its tunnel-arrangement the appliance of an uninterrupted metallic semiconductor substrate support/ transfer-band with a roll-arrangement near the entrance - and exit thereof, in the begin-section of this tunnel- arrangement upon this band, containing an already in a foregoing device upon at-least the central section

thereof applied micrometer high film of a temporary stitch-substance, the accomplishing of at-least also a micrometer high di-electric layer as the semiconductor bottom-layer of the successive substrate-sections, pasing therethrough, with such a sufficient height thereof, that in the device behind this tunnel-arrangement by means of dividing thereof the obtaining of semiconductor chips with such a di-electric bottom-layer thereof.

63. Semiconductor installation according to Claim 62, characterized that way and further containing such means, that thereby in successive sections of the tunnel- arrangement upon this di-electric bottom-layer the

uninterruptedly taking place of the establishing of a micrometer high metallic in-between layer, with above again a micrometer high layer of a di-electric substance, on behalf of in this tunnel-arrangement the accomplishing of successive substrate-sections, containing as a total semiconductor bottom-layer such combination of layers

and the also obtaining of semiconductor chips with such a strengthened semiconductor bottom-layer thereof.

64. Semiconductor installation according to one of the foregoing Claims, characterized that way, executed such and containing such means, that thereby in the therein located semiconductor tunnel-arrangement during its operation at at- least the central section of an uninterrupted folio,

uninterruptedly displacing therethrough, the uninterruptedly taking place of the creation of at-least one semiconductor layer, functioning also as a semiconductor top-layer

of the successive semiconductor substrate-sections,

uninterruptedly displacing therethrough, with at-least also the following semiconductor layer-erections of the therefrom obtained semiconductor chips:

a) the combination of a synthetic bottom-layer and a dielectric top-layer; or

b) the combination of a synthetic bottom-layer, a metallic in-between layer and a di-electric top-layer; or

c) the combination of a metallic bottom-layer and a dielectric top-layer; or

d) exclusively a common di-electric bottom- arid top-layer ; or g) the combination of a di-electric bottom-layer, a metallic in-between layer and a di-electric top-layer.

65. Semiconductor installation according to Claim 64, characterized that way, that as therby in such tunnel- arrangement thereof the establishing of successive semicon- ductor substrate-sections, containing a number of above each-other located primary semiconductor layers with

secundary semiconductor in-between layers, in-which the location of a number of metallic in-between connections between these primary layers, wherein the location of a number of metallic connections between these primary layers, in the device, located thereafter, at-least also by means of diversion of these successive semiconductor substrate- sections the establishing of semiconductor chips, containing aside the possible under a) through e) mentioned layers also such semiconductor in-between layers.

66. Semiconductor installation according to one of the foregoing Claims, characterized that way, executed such and containing such means, that as thereby in its semiconductor tunnel-arrangement exclusively the appliance of an uninterrupted metallic semiconductor substrate support/transfer- band, with a roll-arrangement near the entrance and exit thereof and with therein during its operation the accompli- shing of successive semiconductor substrate-sections with at-least also a semiconductor layer upon its central

semiconductor processing-section, functioning also as a semiconductor top-layer of these semiconductor substrate- sections, thereby at-least in addition the following

establishing of semiconductor layers of the in the device behind this tunnel-arrangement by means of separation thereof established semiconductor chips, containing at-least also the following:

a) only a di-electric bottom-layer, also functioning as a di-electric top-layer; or

b) the combination of a di-electric bottom-layer, a metallic in-between layer and a di-electric top-layer.

67. Semiconductor installation according to Claim 66, characterized that way, that as thereby in such tunnel- arrangement the accomplishing of successive semiconductor substrate-sections, containing a number of above each-other located primary semiconductor layers with secundary semiconductor in-between layers, wherein the location of a number of metallic connections between these primary layers, in the thereafter located device at-least also the obtaining of semiconductor chips, containing at-least also aside the possibly b) mentioned semiconductor layers in addition such semiconductor in-between layers.

68. Semiconducto installation according to one of the foregoing Claims, characterized such, further containing such means, that as thereby in said semiconductor tunnel- arrangement thereof the application of an uninterrupted semiconductor substrate supply/transfer-band and the thereupon uninterruptedly taking place of the from a folio storage roll-arrangement thereupon applied successive semiconductor folio-sections, thereby at-least also the in Claims 64 and 65 under a) through e) mentionened possible layer-erections of the obtained semiconductor chips.

69. Semiconductor installation according to one of the foregoing Claims, characterized that way and further executed such, that thereby such semiconductor synthetic folio or established synthetic layer contains a to a sufficient extent high melting-point and a di-electric value thereof on behalf of the at-least also functioning thereof as an at-least temporary semiconductor bottom- layer of the in this semiconductor tunnel-arrangement thereof accomplished semiconductor substrate-sections, with thereby typically not a semiconductor in-between layer or - layers thereof.

70. Semiconductor installation according to Claim 69, containing further such means, that thereby the functioning of the synthetic folio or - layer also as a semiconductor top-layer of these successive semiconductor substrate- sections, displacing therethrough, under thereto also in this tunnel-arrangement in a strip-shaped semiconductor processing-section the taking place of a lightning- process of the successive substrate-sections, displacing underneath, on behalf of the establishing of with a metal filled nanometer-sized recesses in the top-wall thereof.

71. Semiconductor installation according to one of the foregoing Claims, characterized that way, executed such and containing such means, that thereby the appliance of paper in such a thereto suitable execution and composition thereof, that this paper is applicable for such a semiconductor bottom-layer and possibly top-layer of the in the semiconductor tunnel-arrangement thereof accomplished semiconductor substrate-sections, and with the there- after positioned device at least also by means of dividing thereof the obtaining of semiconductor chips with such paper bottom-layer thereof.

72. Semiconductor installation according to one of the foregoing Claims, characterized that way, further executed such and containing such means, that thereby under the appliance of such synthetic - or paper folio, in typically this tunnel-arrangement upon at-least the central semicon- ductor processing-section thereof the taking place of the appliance of a micrometer high layer of a di-electric substance on behalf of the therein accomplishing of with metal filled nanometer wide recesses in the top-wall of the therein established successive semiconductor substrate- sections and thereupon by at-least also a dividing thereof in the device, located behind this tunnel-arrangement, the accomplishing of semiconductor chips with such a semiconductor bottom - and top-layer thereof.

73. Semiconductor installation according to one of the foregoing Claims, characterized that way, that it contains devices on behalf of at-least also the following:

a) starting the supply of semiconductor transfer- and

processing-mediums and the discharge thereof;

b) during a very long period of time the maintaining of a continuous supply - and discharge of these mediums; and c) ending of at-least the continuous supply of these

semiconductor transfer- and processing-mediums.

74. Semiconductor installation according to one of the foregoing Claims, characterized that way, further executed such and containing such means, that thereby therein the possible appliance of multiple semiconductor executions and means of the semiconductor installations, - tunnel- arrangements, - devices and - chips, as shown and described in the by this Applicant applied related Dutch Patent- Applications.

75. Semiconductor installation according to Claim 74, characterized that way and further executed such, that ' therein the possible application of semiconductor devices, contained in the existing semiconductor installations under the use of semiconductor modules, that already are described in Patents, if therein the mentioning in the text and Claims of the following:

a) an individual semiconductor wafer or - substrate: and/or b) a whether or not individual semiconductor processing - module.

76. Mehod of a semicontor installation, containing a semiconductor substrate transfer/processing tunnel- arrangement, characterized such, that thereby during the operation of this tunnel-arrangement the at-least almost continuously taking place of an at-least almost uninterruptedly displacing therethrough of successive, joining

semiconductor substrate-sections on behalf Ρί the therein taking place of also a series of semiconductor processings thereof .

77. Method of the semiconductor installation according to Claim 76, characterized such, that thereby in this semiconductor tunnel-arrangement the taking place of such a great number of semiconductor processings of these successive substrate-sections, that in a behind thereof located device by means of separation thereof the accomplishing of semiconductor chips.

78. Method of the semiconductor installation according to one of the foregoing Claims, characterized such, that thereby the width of such tunnel-arrangement thereof is less than 2 meters.

79. Method of the semiconductor installation according to one of the foregoing Claims, characterized such, that as thereby such a therein located tunnel-arrangement at-least also contains successive semiconductor processing-sections, therein during its operation the uninterruptedly taking place of successive semiconductor processings of the successive substrate-sections, uninterruptedly displacing therethrough.

80. Method of the semiconductor installation according to Claim 79, characterized such, that thereby in such tunnel- arrangement thereof the at-least almost uninterruptedly displacing therethrough of successive sections of an

uninterrupted folio as an at-least temporary semiconductor underlayer of these successive semiconductor substrate- sections .

81. Method of the semiconductor installation according to Claim 80, characterized such, that this folio consists of at-least one solid substance, enabling its functioning as such an at-least temporary semiconductor underlayer.

82. Method of the semiconductor installation according to Claim 81, characterized such, that this folio thereby at-least consists of a metallic substance.

83. Method of the semiconductor installation according to Claim 81, characterized such, that this folio thereby at-least also consists of a synthetic substance.

84. Method of the semiconductor installation according to one of the foregoing Claims, characterized such, that thereby in a device behind the therein located tunnel- arrangement by-means of dividing these successive

semiconductor substrate-sections the establishing of semiconductor chips with such a semiconductor underlayer thereof .

85. Method of the semiconductor installation according to Claim 81, characterized such, that thereby in a device behind the therein located tunnel-arrangement by means of dividing these successive semiconductor substrate- sections the accomplishing of semiconductor chips with at- least a synthetic underlayer and a di-electric top-layer.

86. Method of the semiconductor installation according to one of the foregoing Claims, characterized such, that thereby the thickness of such folio is less than 0,2 mm.

87. Method of the semiconductor installation according to Claim 86, characterized such, that thereby the tunnel- passage of such tunnel-arrangement only to a small extent is wider than the breadth of such folio.

88. Method of the semiconductor installation according to one of the foregoing Claims, characterized such, that thereby the application of a folio with at-least almost parallel upward sidewalls thereof.

89. Method of the semiconductor installation according to one of the foregoing Claims, characterized such, that as thereby therein the location of a device on behalf of the availability of such a very long folio, during a very long period of time an uninterrupted lineair displacement of the successive sections thereof is taking place through such semiconductor tunnel-arrangement.

90. Method of the semiconductor installation according to Claim 89, characterized such, that as thereby the use of a folio storage-roll, an uninterrupted supply of succes- sive folio-sections is taking place.

91. Method of the semiconductor installation according to one of the foregoing Claims, characterized such, that thereby the duration of time of such an uninterrupted displacement of these successive folio-sections through almost all semiconductor processing-sections of such tunnel-arrangement amounts at-least 2 months.

92. Method of the semiconductor installation according to one of the foregoing Claims, characterized such, that thereby the velocity of displacement of the successive substrate-sections through such tunnel-arrangement is less than 3 mm per second.

93. Method of the semiconductor installation according to one of the foregoing Claims, characterized such, that as thereby such semiconductor tunnel-arrangenent , containing at-least also an upper- and lowertunnelblock , uninterruptedly extending in the lineair displacement-direction of these successive semiconductor substrate-sections, displacing therethrough, enables such displacement.

94. Method of the semiconductor installation according to Claim 93, characterized such, that thereby the passageway of such semiconductor tunnel-arrangement for the successive semiconductor substrate-sections, displacing therethrough during its operation, only at the entrance- and exit-side thereof is in an open connection with the atmospheric outer air under the appliance of a gaseous medium-lock at at-least the entrance-side thereof.

95. Method of the semiconductor installation according to one of the foregoing Claims, characterized such, that as thereby behind the exit of the therein located tunnel- arrangement the insertion of a device, therein at-least by means of dividing the successive, therein uninterruptedly displacing semiconductor processed semiconductor substrate-sections, the accomplishing of semiconductor chips .

96. Method of the semiconductor installation according to one of the foregoing Claims, characterized such, that thereby therein the taking place of government of at-least also the successive semiconductor processings in such a tunnel-arrangement and the therein located semiconductor substrate transfer-system on behalf of an at-least almost uninterrupted uniform displacement of the successive semiconductor substrate-sections therethrough.

97. Method of the semiconductor installation according to Claim 96, characterized such, that thereby for that purpose in at-least the end-section of such tunnel- arrangeent the continuously exercising of a tractive-power upon the successive semiconductor substrate-sections, displacing therethrough.

98. Method of the semiconductor installation according to one of the foregoing Claims, characterized such, that in the exit-section of such therein located tunnel-arrangement at-least the also taking place of removal therefrom of the successive folio-sections as a temporary semiconductor underlayer of the therein accomplished semiconductor substrate-sections.

99. Method of the semiconductor installation according to Claim 98, characterized such, that thereby in the entrance-section of this tunnel-arrangement the taking place of the application of a micrometer-high film of a fluidic stitch-substance, with a high boiling-temperature thereof on behalf of the temporary in this tunnel- arrangement taking place of a temporary anchorage upon this folio of the successive, therein accomplished

semiconductor substrate-sections.

100. Method of the semiconductor installation as in one of the foregoing Claims, characterized such, that as for that purpose in the exit-section of this tunnel- arrangement the location of a discharge-roll, the displacement in an downward direction of the from the in a lineair direction displacing semiconductor substrate- sections successively removed folio-sections takes place.

101. Metod of the semiconductor installation according to Claim 100, characterized such, that thereby in a device behind this roll-arrangement by means of dividing of the removed semiconductor substrate-sections the accomplishing of semiconductor chips with typically a di-electric underlayer thereof.

102. Method of the semiconductor installation according to Claim 100, characterized such, that as it also contains a storage-roll for these successively removed folio- sections, with in-between this dischargeroll-arrangement and this storage-roll the location of a cleaning-divice , therein a cleaning of these successive folio-sections, displacing therethrough, is taking place.

103. Method of the semiconductor installation according to Claim 100, characterized such, that as thereby therein the location of a roll-arrangement at the entrance-side of such tunnel-arrangement, thereby the taking place of the successive, uninterruptedly through this tunnel- arrangement displacing folio-sections as a part of an uninterrupted semiconductor substrate support-transfer- band .

104. Method of the semiconductor installation according to Claim 103, characterized such, that as thereby underneath this tunnel-arrangement in-between these two roll- arrangements at-least also the insertion of a cleaning- device, thereby the taking place of cleaning these successive semiconductor band-sections, uninterruptedly displacing therethrough.

105. Method of the semiconductor installation according to Claim 104, characterized such, that thereby during the operation of this tunnel-arrangement this metallic

semiconductor substrate support/transfer-band functions to therewith displace successive semiconductor substrate- sections through this tunnel-arrangement as a temporary semiconductor underlayer of these successive semiconductor substrate-sections.

106. Method of the semiconductor installation according to Claim 105, characterized such, that as thereby the central semiconductor processing -section of this band has been deepened, therein during the operation thereof at-least the taking place of erection of successive semiconductor substrate-sections.

107. Method of the semiconductor installation according to Claims 105 and 106, characterized such, that as thereby underneath this tunnel-arrangement between these two roll- arrangements behind the therein located cleaning-device on behalf of the cleaning of the successive, uninterruptedly displacing semiconductor band-sections therethrough, the location of a device to at-least in the central semiconductor processing-section thereof the establishing of a micrometer high film of a fluidic high-boiling stitch- substance on behalf of the during the displacing of the successive sections of the substrate support /transfer-band through this tunnel-arrangement thereby to a sufficient extent such an at-least temporary anchorage thereupon of the therein established successive semiconductor substrate- sections, that in a device behind this tunnel-arrangement the possible taking place of separation of these successive semiconductor substrate-sections from the successive band- sections .

108. Method of the semiconductor installation according to Claim 107, characterized such, that thereby in this tunnel-arrangement in its begin-section upon this layer of such a temporary stitch-substance the taking place of establishing a semiconductor underlayer for these successive semiconductor substrate-sections.

109. Method of the semiconductor installation according Claim 108, characterized such, that thereby for this semiconductor underlayer the possible appliance of any thereto suitable semiconductor substance.

110. Method of the semiconductor installation according to Claim 109, characterized such, that thereby for these substances of the semiconductor underlayer the appliance has taking place of the combination of a number of upon each other located together-stitched semiconductor layers,, consisting of at-least also additional semiconductor substances .

111. Method of the semiconductor installation according to Claim 110, characterized such, that thereby for this underlayer in this tunnel-arrangec33t t a sstablishing of a micrometer high di-electric substance.

112. Method of the semiconductor installation according to Claim 110, characterized such, that thereby for this underlayer in this semiconductor tunnel-arrangement the establishing of a micrometer high metallic substance.

113. Method of the semiconductor installation- according to one of the foregoing Claims, characterized such, that as thereby near the entrance of the therein located

tunnel-arrangement the location of a storage-roll for the temporary storage of a very long folio, during the opera- tion of this tunnel-arrangement the uninterruptedly taking place of at the entrance-side thereof applying of

successive folio-sections as an at-least temporary

semiconductor underlayer of these successive, therethrough displacing semiconductor substrate-sections upon the cen- tral semiconductor processing-section of the successive, already uninterrupted semiconductor substrate support/ transfer-bandsections.

114. Method of the semiconductor installation according to Claim 113, characterized such, that thereby the material for this folio consists of at-least a synthetic substance.

115. Method of the semiconductor installation according to Claim 113, characterized such, that thereby the material for this folio at-least also consists of a soft metallic substance .

116. Method of the semiconductor installation according to one of the foregoing Claims, characterized such, that this folio thereby consists of a number of different semiconductor substances.

117. Method of the semiconductor installation according to one of the foregoing Claims, characterized such, that thereby in the entrance-section of this tunnel-arrangement the uninterruptedly taking place of the establishing of a number of upon each other located micrometer-high di- electrical substances upon the successive semiconductor folio-sections, uninterruptedly displacing therethrough.

118. Method of the semiconductor installation according to Claim 117, characterized such, that thereby in there- upon following strip-shaped upper semiconductor processing split-sections at the central semiconductor processing- section of this tunnel-arrangement the thereupon taking place of all following establishings of semiconductor layers and primary semiconductor processings to accomplish such successive semiconductor substrate-sections, that out of that in a device behind the exit thereof by means of dividing of these substrate-sections the establishing of semiconductor chips.

119. Method of the semiconductor installation according to Claim 118, characterized such, that thereby under the application of such an uninterrupted semiconductor

substrate support /transfer-band the thereupon accomplished bottom-layer not to such extent is stitched thereupon, that thereby after all these having taken place successive semiconductor establishings and - processings in this device the taking place of separation of the semiconductor top-layer, including this semiconductor bottom-layer, as successive semiconductor substrate-sections have been removed from this band, after-which by means of dividing this semiconductor top-layer the accomplishing of semiconductor chips with this di-electric bottomlayer.

120. Method of the semiconductor installation according to Claim 113, characterized such, that as thereby the vertical sidewalls of such deepened flat upperwall-section of this band, as seen in both the length- as height- direction, also at-least almost are flat and these sidewalls are also almost parallel with both upward sidewalls of this band, the accomplishing of an optimal filling thereof with such successive folio-sections.

121. Method of the semiconductor installation according to Claim 120, characterized such, that as thereby during the operation of this tunnel-arrangement the uninterruptedly displacing therethrough of the successive band-sections, with thereupon successive sections of an uninterrupted folio, the thereby maintaining of an at-least almost parallel position of the upward sidewalls of the folio- sections with the therewith corresponding upward side- walls of the tunnel-passage.

122. Method of the semiconductor installation according to Clsim 121, characterized such, that thereby by means of successive flows of gaseous medium along at-least also this folio, the uninterruptedly maintaining of the

following:

a) conducting of this band along an upward sidewall of the tunnel-passage; and

b) reclining of the successive folio-sections with one

upward sidewall thereof against the therewith corres- ponding upward sidewall of this deepened upperwall- section of this band.

123. Method of the semiconductor installation according to one of the foregoing Claims, characterized such, that thereby in the tunnel-arrangement, contained therein, during the in a strip-shaped upper processing-section thereof uninterruptedly taking place of a heating-process of the semiconductor toplayer-section of the successive, uninterruptedly underneath thereof displacing substrate- sections, the preventage of an unallowable deformation thereof in at-least its transverse direction.

124. Method of the semiconductor installation according to Claim 123, characterized such, that as thereby in such heating-processingsection in the lower wall of the upper- tunnelblock the location of an electric strip-shaped heating-element, with a micrometer breadth thereof, therewith during a very short period of time the heating of only mainly a micrometer high layer of an established semiconductor substance, as for instance a di-electric layer, is taking place.

125. Method of the semiconductor installation according to Claim 124, characterized such, that as thereby in the length-direction beyond thereof in this block the location of an also strip-shaped cooling-section, thereby a cooling-off takes place of this layer.

126. Method of the semiconductor installation according to one of the foregoing Claims, characterized such, that thereby in such tunnel-arrangement thereof the uninterrup- tedly taking place of the establishing of at-least one semiconductor top-layer upon the semiconductor band- sections, during its operation uninterruptedly displacing therethrough, and whereby at-least also the following:

a) an allowable deformation thereof during such semicon- ductor processing-process; and

b) a small acceptable expansion of these successive

semiconductor substrate-sections in the length-direction of the tunnel-passage during their lineair displacement therethrough .

127. Method of the semiconduc or installation according to Claim 126, characterized such, that thereby this band a very thin semiconductor folio is, displacing therethrough.

128. Method of the semiconductor installation according to Claim 126, characterized such, that thereby this band such an uninterrupdmetallic semiconductor substrate suppor /transfer^band is.

129. Method of the semiconductor installation according to Claim 126, characterized such, that as thereby for such successive semiconductor toplayer-sections . by means.of typically only one strip-shaped lightning-device the establishing of a lightning-pattern, thereby the application of only one common semiconductor top-layer.

130. Method of the semiconductor installation according to Claim 126, characterized such, that thereby in such semiconductor tunnel-arrangement thereof the accomplishing of a number of upon each other positioned semiconductor main layers, with in-between a di-electric layer, containing some metallic inner-connections therefor.

131. Method of the semiconductor installation according to one of the foregoing Claims, characterized such, that thereby by means of a strip-shaped supply-device for a strip-shaped lightning-pattern, located in at-least the uppertunnelblock of this tunnel-arrangement, the taking place of the applying of a strip-shaped lightning-pattern upon the successive, underneath thereof displacing

semiconductor substrate-sections.

132. Method of the semiconductor installation according to Claim 131, characterized such, that thereby in both transverse ends of such semiconductor band or - folio the establishing of successive recesses on behalf of by means of this band or folio the also displacing therewith of this applying-device of such lightning-pattern during the lightning-process.

133. Method of the semiconductor installation according to one of the foregoing Claims, characterized such, that thereby after the joining of another semiconductor folio with the back-side of the already through the tunnel- arrangement displacing folio, thereafter upon at-least one place a stitch-connection in-between thereof has been accomplished and on-which the use of any type of already commonly used stitch-method, as for instance the establishing of a weld-connection or melting-together of both folio-ends.

134. Method of the semiconductor installation according to one of the foregoing Claims, characterized such, that in the therein located tunnel-arrangement during its operation the taking place of all required semiconductor appliances of - substances and - processings of the successive semiconductor substrate-sections, uninterruptedly displacing thereth ough, and after the displacement thereof out of this tunnel-arrangement through its exit- side, in a thereafter located device-combination at-first the taking place of removal of this layer fluidic guidance- medium therefrom and thereupon therein the taking place of dividing of these successive semiconductor substrate- sections under the accomplishing of semiconductor chips.

135. Method of the semiconductor installation according to Claim 134, characterized such, that as thereby in this tunnel-arrangement during its operation the therein taking place of an uninterruptedly displacing therethrough of a folio from a folio storage-roll, thereby the successive folio-sections^; functioning as a definite semiconductor bottom-layer of the therein established semiconductor substrate-sections and whereby in a device behind this tunnel-exit by means of at-least also a dividing thereof the accomplishing of semiconductor chips with a folio- part as their semiconductor bottom-layer.

136. Method of the semiconductor installation according to Claim 134, characterized such, that as thereby in this tunnel-arrangement during its operation the therein taking place of an uninterrupted displacement of an uninterrupted semiconductor folio, derived from a folio storage-roll, with thereupon at at-least the central semiconductor processing-section . thereof in the begin-section of the tunnel-passage the application thereupon of a micrometer high layer of a fluidic temporary stitch-medium and thereupon therein the taking place of the establishing of successive semiconductor substrate-sections, containing a di-electric bottom-layer thereof, with in the begin-section of the behind this tunnel-arrangement inserted device the uninterruptedly taking place of removal in downward direction of the successive folio-sections together with a part of the temporary stitch-substance from the successive substrate-sections, displacing therethrough, and in the end-section of this device by means of dividing the accom- plishing of semiconductor chips with a di-electric bottom- layer thereof.

137. Method of the semiconductor installation according to Claim 134, characterized such, that as in its tunnel- arrangement the appliance of an uninterrupted metallic semiconductor substrate support/transfer-band with a roll- arrangement near the entrance - and exit thereof, in the begin-section of this tunnel-arrangement upon this band, containing an already in a foregoing device upon at-least the central section thereof applied micrometer high film of a temporary stitch-substance, the accomplishing of at- least also a micrometer high di-electric layer as the semiconductor bottom-layer of the successive substrate- sections, pasing therethrough, with such a sufficient height thereof, that in the device behind this tunnel- arrangement by means of dividing thereof the obtaining of semiconductor chips with such a di-electric bottomlayer thereof .

138. Method of the semiconductor installation according to Claim 137, characterized such, that thereby in successive sections of the tunnel-arrangement upon this dielectric bottomlayer the uninterruptedly taking place of the establishing of a micrometer-high metallic in-between layer, with above again a micrometer high layer of a dielectric substance, on behalf of in this tunnel-arrangement the accomplishing of successive substrate-sections, containing as a total semiconductor bottom-layer such combination of layers and the also obtaining of semicon- ductor chips with a strengthened semiconductor bottom- layer thereof.

139. Method of the semiconductor installation according to one of the foregoing Claims, characterized such, that thereby in the therein located tunnel-arrangement during its operation at at-least the central section of an

uninterrupted folio, uninterruptedly displacing

therethrough, the uninterruptedly taking place of the creation of at-least one semiconductor layer, functioning also as a semiconductor top-layer of the successive semi- conductor substrate-sections, uninterruptedly displacing therethrough, with at-least also the following semiconductor layer-erections of the therefrom obtained semiconductor chips:

a) the combination of a synthetic bottomlayer and a di- electric toplayer; or

b) the combination of a synthetic bottomlayer, a metallic in-between layer and a di-electric toplayer; or

c) the combination of a metallic bottomlayer and a dielectric toplayer; or

d) exclusively a common di-electric bottom- and toplayer; or

e) the combination of a di-electric bottomlayer, a metallic in-between layer and a di-electric toplayer.

140. Method of the semiconductor installation according to Claim 139, characterized such, that as thereby in such tunnel-arrangement the establishing of successive semiconductor substrate-sections, containing a number of above each-other located primary semiconductor layers with

secundary semiconductor in-between layers, in-which the location of a number of metallic in-between connections between these primary layers, wherein the location of a number of metallic connections between these primary layers, in the device, located thereafter, at-least also by means of diversion of these successive semiconductor substrate- sections the establishing of semiconductor chips, containing aside the possible under a) through e) mentioned layers also such semiconductor in-between layers.

141. Method of the semiconductor installation according to one of the foregoing Claims, characterized such, and containing such means, that as thereby in its semiconductor tunnel-arrangement exclusively the appliance of an uninterrupted metallic semiconductor substrate support/transfer- band, with a roll-arrangement near the entrance and exit thereof and with therein during its operation the accomplishing of successive semiconductor substrate-sections with at-least also a semiconductor layer upon its central semiconductor processing-section, functioning also as a semiconductor top-layer of these semiconductor substrate- sections, thereby at-least in addition the following establishing of semiconductor layers of the in the device behind this tunnel-arrangement by means of separation thereof established semiconductor chips, containing at- least also the following:

a) only a di-electric bottom-layer, also functioning as a di-electric top-layer; or

b) the combination of a di-electric bottom-layer, a metallic in-between layer and a di-electric top-layer.

142. Method of the semiconductor installation according to Claim 141, characterized such, that as thereby in such tunnel-arrangement the accomplishing of successive semiconductor substrate-sections, containing a number of above each-other located primary semiconductor layers with secundary semiconductor in-between layers, wherein the location of a number of metallic connections between these primary layers, in the thereafter located device at-least also the obtaining of semiconductor chips, containing at- least also aside the possibly under b) mentioned semiconductor layers in addition such semiconductor in-between layers.

143. Method of the semiconductor installation according to one of the foregoing Claims, characterized such, that as thereby in said tunnel-arrangement thereof the application of an uninterrupted semiconductor substrate supply/ transfer-band and the thereupon uninterruptedly taking place of the from a folio storage roll-arrangement there- upon applied successive semiconductor folio-sections, thereby at-least also the in Claims 139 and 140 under a) through e) mentioned possible layer-erections of the obtained semiconductor chips.

144. Method of the semiconductor installation according to one of the foregoing Claims, characterized such, that as thereby such semiconductor synthetic folio or established synthetic layer contains a to a sufficient extent high melting-point and a - di-electric value thereof, the at-least also functioning thereof as an at-least temporary semiconductor bottom-layer of the in this tunnel-arrangement thereof accomplished semiconductor substrate-sections, with thereby typically not a semiconductor in-between layer or - layers thereof.

145. Method of the semiconductor installation according to Claim 144, containing further such means, that thereby the functioning of the synthetic folio or - layer also as a semiconductor top-layer of these successive semiconductor substrate-sections, displacing therethrough, under thereto also in this tunnel-arrangement in a strip-shaped semicon- ductor processing-section the taking place of a lightning- process of the successive substrate-sections, displacing underneath, on behalf of the establishing of with a metal filled nanometer-sized recesses in yhe top-wall thereof.

146. Method of the semiconductor installation according to one of the foregoing Claims, characterized such, that thereby the appliance of paper in such a thereto suitable execution and composition thereof, that this paper is applicable for such a semiconductor bottomlayer and

possibly top-layer of the in the tunnel-arrangement thereof accomplished semiconductor substrate-sections, and with such thereafter positioned device at-least also by means of dividing thereof the obtaining of semiconductor chips with such paper bottomlayer thereof.

147. Method of the semiconductor installation according to one of the foregoing Claims, characterized such, that thereby under the appliance of such synthetic - or paper folio, in typically this tunnel-arrangement upon at-least the central semiconductor processing-section thereof the taking place of the appliance of a micrometer high layer of a di-electric substance on behalf of the therein

accomplishing of with a metallic substance filled nanometer wide recesses in the top-wall of the therein established successive semiconductor substrate-sections and thereupon by at-least also a dividing thereof in the device, located behind this tunnel-arrangement, the accomplishing of semiconductor chips with such a semiconductor bottom- and toplayer thereof.

148. Method of the semiconductor installation according to one of the foregoing Claims, characterized such, that it contains devices on behalf of at-least also the following: a) starting the supply of semiconductor transfer- and

processing-mediums and the discharge thereof;

b) during a very long period of time the maintaining of a continuous supply - and discharge of these mediums; and c) ending of at-least the continuous supply of these

semiconductor transfer- and processing-mediums.

149. Method of the semiconductor installation according to one of the foregoing Claims, characterized such, that thereby therein the possible appliance of multiple semiconductor executions and means of the semiconductor installations, - tunnel-arrangements, - devices and - chips, as shown and described in the vy this Applicant applied related Dutch Patent-Applications.

150. Method of the semiconductor installation according to Claim 149, characterize such, that as therein the possible application of semiconductor devices, contained in the existing semiconductor installations under the use of semiconductor modules, that already are described in Patents, if therein the mentioning in the text and Claims of the following:

a) an individual semiconductor wafer or -substrate; and/or b) a whether or not individual semiconductor processing- module ,

the in an adapted form or configuration thereof making use thereof in this installation.