Title:
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
Document Type and Number:
WIPO Patent Application WO/1997/032399
Kind Code:
A1
Abstract:
A semiconductor integrated circuit device generates an output signal (Vpw) having a logical amplitude specified by a first power source (Vssl) and a third power source (Vss2) which is lower in potential than the first power source (Vssl) from a substrate bias control signal by means of a first signal voltage level converting circuit (A1) and a first logic circuit (A2) and impresses the output signal (Vpw) upon a P-well in an N-channel MOS transistor formed in a function module in the device. The device also generates another output signal (Vnw) having a logical amplitude specified by a second power source (Vdd1) and a fourth power source (Vdd2) which is higher in potential than the second power source (Vdd1) from the substrate bias control signal by means of a second signal voltage level converting circuit (B1) and a second logic circuit (B2) and impresses the signal (Vnw) upon an N-well in a P-channel MOS transistor formed in the functional module in the circuit device. When this semiconductor integrated circuit device is used, the power consumption of the device can be reduced in a standby mode by raising the threshold voltage by impressing a substrate bias, and the operating speed of the device can be increased in an operation mode by lowering the threshold voltage by releasing the device from the substrate bias. The increase of the operating speed at the operating time and the lowering of the power consumption at the standby time are simultaneously realized by securing a new power supply wiring area for controlling PMOS and NMOS back gate electrodes which are different in potential from power supply wiring and grounding wiring and providing a wiring rule which permits efficient wiring layout, and then, making the layout design of the power supply wiring and signal wiring easier.
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Inventors:
KANAI MASAHIRO (JP)
Application Number:
PCT/JP1997/000608
Publication Date:
September 04, 1997
Filing Date:
February 28, 1997
Export Citation:
Assignee:
SEIKO EPSON CORP (JP)
KANAI MASAHIRO (JP)
KANAI MASAHIRO (JP)
International Classes:
H03K19/00; H03K19/0185; (IPC1-7): H03K19/0948; H01L21/8238; H01L27/04; H01L27/118; H03K19/0185
Foreign References:
| JPH0689574A | 1994-03-29 | |||
| JPS62123823A | 1987-06-05 | |||
| JPH0774616A | 1995-03-17 | |||
| JPH02268018A | 1990-11-01 | |||
| JPH07142605A | 1995-06-02 | |||
| JPH0382152A | 1991-04-08 | |||
| JPS63202053A | 1988-08-22 | |||
| JPS63107140A | 1988-05-12 | |||
| JPH02177345A | 1990-07-10 | |||
| JPH05275661A | 1993-10-22 | |||
| JPS6364337A | 1988-03-22 | |||
| JPH09116416A | 1997-05-02 | |||
| JPH08204140A | 1996-08-09 |
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