SEMICONDUCTOR INTEGRATED CIRCUIT AND MICROCOMPUTER

Title:

SEMICONDUCTOR INTEGRATED CIRCUIT AND MICROCOMPUTER

Document Type and Number:

WIPO Patent Application WO/1998/020407

Kind Code:

A1

Abstract:

In a semiconductor integrated circuit provided with a clock generating circuit using a PLL circuit and a serial communication circuit, a clock having a frequency which is a power of 2 is inputted into the clock generating circuit as a reference clock from the outside and the multiplier is so determined that the circuit generates a clock having the frequency which is the common multiple of the frequency of the clock inputted to the clock generating circuit from the outside and that of the transfer rate. The serial communication circuit is operated based on a clock whose frequency is an integral submultiple of the frequency of a clock fed from the clock generating circuit and is not a power of 2, and transmits and receives serial data at the transfer rate according to the frequency that is not a power of 2.

Inventors:

YAMADA TOSHIO (JP)
MATSUI SHIGEZUMI (JP)
KURITA KOZABURO (JP)
HASEGAWA KIYOSHI (JP)
KUDOH IKUO (JP)

Application Number:

PCT/JP1996/003252

Publication Date:

May 14, 1998

Filing Date:

November 07, 1996

Export Citation:

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Assignee:

HITACHI LTD (JP)
HITACHI ULSI ENG CORP (JP)
YAMADA TOSHIO (JP)
MATSUI SHIGEZUMI (JP)
KURITA KOZABURO (JP)
HASEGAWA KIYOSHI (JP)
KUDOH IKUO (JP)

International Classes:

G06F1/10; G06F15/78; H03K23/66; H03K23/68; H03L7/093; H04L25/38; (IPC1-7): G06F1/10; G06F15/78; H03K23/66; H03K23/68; H03L7/093; H04L25/38

Foreign References:

JPH06290281A	1994-10-18
JPH05143530A	1993-06-11
JPH0378298U	1991-08-07
JPH07170178A	1995-07-04

Attorney, Agent or Firm:

Obinata, Tomio (4 Kagurazaka 3-chom, Shinjuku-ku Tokyo 162, JP)

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