Title:
SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2013/157206
Kind Code:
A1
Abstract:
In this semiconductor integrated circuit, a clock generating circuit (50) and an internal circuit (30) comprising a transistor (11) are formed on a semiconductor substrate (10) of a first conductivity type. The clock generating circuit (50) has a ring oscillator (51). The transistor (11) has a first well (13) of a first conductivity type, and, formed in the first well (13), second wells (14, 15) of a second conductivity type and a third well (16) of the first conductivity type. A first interconnect (93) connected to the second well (16), and a second interconnect (94) connected to the third well (16), in the transistor (11) constituting the clock generating circuit (50) are respectively connected independently to ground members (92, 98).
Inventors:
ISHIKAWA YASUYUKI (JP)
Application Number:
PCT/JP2013/002240
Publication Date:
October 24, 2013
Filing Date:
April 01, 2013
Export Citation:
Assignee:
DENSO CORP (JP)
International Classes:
H01L21/822; H01L21/8234; H01L27/04; H01L27/06; H01L27/088; H03B5/02; H03K3/03; H03K3/354
Domestic Patent References:
| WO1997032399A1 | 1997-09-04 |
Foreign References:
| JP2005269516A | 2005-09-29 | |||
| JP2009117858A | 2009-05-28 | |||
| JPS62185364A | 1987-08-13 | |||
| JPH1117111A | 1999-01-22 | |||
| JPH0223663A | 1990-01-25 | |||
| JP2006245551A | 2006-09-14 |
Attorney, Agent or Firm:
KIN, Junhi (JP)
Gold Junki (JP)
Gold Junki (JP)
Download PDF: