Title:
SEMICONDUCTOR MODULE
Document Type and Number:
WIPO Patent Application WO/2017/159029
Kind Code:
A1
Abstract:
A semiconductor module according to one embodiment of the present invention comprises an insulating substrate on which a power conversion circuit is mounted, a first transistor that constitutes an upper arm, a second transistor that constitutes a lower arm, a first input wiring pattern to which a positive-side input terminal is connected, a second input wiring pattern to which a negative-side input terminal is connected, an output wiring pattern to which an output terminal is connected, and an absorption element that absorbs surge voltage. The first input wiring pattern has a first transistor mounting area on which the first transistor is mounted, the output wiring pattern has a second transistor mounting area on which the second transistor is mounted, the second input wiring pattern has an absorption element connection area that is positioned between the first and second transistor mounting areas, and the absorption element connection area and the first transistor mounting area are electrically connected via the absorption element.
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Inventors:
OOMORI HIROTAKA (JP)
Application Number:
PCT/JP2017/001565
Publication Date:
September 21, 2017
Filing Date:
January 18, 2017
Export Citation:
Assignee:
SUMITOMO ELECTRIC INDUSTRIES (JP)
International Classes:
H01L25/07; H01L25/18; H02M7/48
Foreign References:
| JP2005251839A | 2005-09-15 | |||
| JP2015223047A | 2015-12-10 | |||
| JP2015018856A | 2015-01-29 | |||
| JP2013223384A | 2013-10-28 | |||
| JP2004134460A | 2004-04-30 | |||
| JP2015228422A | 2015-12-17 |
Attorney, Agent or Firm:
ITOH, Tadashige et al. (JP)
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