Title:
SEMICONDUCTOR PACKAGE
Document Type and Number:
WIPO Patent Application WO/2017/043480
Kind Code:
A1
Abstract:
This semiconductor package is provided with: a semiconductor chip which is held on a package substrate and has an element formation surface on the reverse side of the package substrate-side surface; and a film substrate which is held on the element formation surface of the semiconductor chip and the upper surface of the package substrate and covers the semiconductor chip. The element formation surface of the semiconductor chip is provided with a chip connection part; the upper surface of the package substrate is provided with a substrate connection part; and the film substrate comprises a wiring line that is provided on a surface facing the semiconductor chip. The chip connection part of the semiconductor chip is electrically connected to the wiring line of the film substrate; the film substrate and the wiring line extend to the outside of the semiconductor chip; and the wiring line is electrically connected to the substrate connection part.
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Inventors:
KUSUMOTO KEIICHI
Application Number:
PCT/JP2016/076166
Publication Date:
March 16, 2017
Filing Date:
September 06, 2016
Export Citation:
Assignee:
SOCIONEXT INC (JP)
International Classes:
H01L23/12; H01L21/60; H01L25/065; H01L25/07; H01L25/18; H05K1/14
Domestic Patent References:
| WO2012086107A1 | 2012-06-28 |
Foreign References:
| JP2005252134A | 2005-09-15 | |||
| JP2005340588A | 2005-12-08 |
Attorney, Agent or Firm:
MAEDA & PARTNERS (JP)
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