Title:
SEMICONDUCTOR PROCESSING SHEET
Document Type and Number:
WIPO Patent Application WO/2017/149926
Kind Code:
A1
Abstract:
This semiconductor processing sheet 1 comprises at least: a substrate 10 including a first surface 101 and a second surface 102; a semiconductor bonding layer 80 including a first surface 801 and a second surface 802; and a peeling film 30 including a first surface 301 and a second surface 302. In the semiconductor processing sheet 1: the arithmetic mean roughness Ra of the first surface 101 is from 0.01 to 0.8 µm; the arithmetic mean roughness Ra of the second surface 302 is greater than 0.05 µm to 0.8 µm or less; and the peeling force β at the interface between the second surface 802 and the first surface 301 after bonding the second surface 802 and the first surface 301 and storing the same at 40°C for three days is from 10 to 1000 mN/50 mm. This semiconductor processing sheet 1 has excellent light transmissibility, and blocking is less likely to occur.
Inventors:
SATO AKINORI (JP)
NAKAMURA MASATOMO (JP)
YAMASHITA SHIGEYUKI (JP)
NAKAMURA MASATOMO (JP)
YAMASHITA SHIGEYUKI (JP)
Application Number:
PCT/JP2017/000187
Publication Date:
September 08, 2017
Filing Date:
January 05, 2017
Export Citation:
Assignee:
LINTEC CORP (JP)
International Classes:
H01L21/301; B32B27/00; C09J7/20; H01L21/304
Domestic Patent References:
| WO2014046121A1 | 2014-03-27 | |||
| WO2016027888A1 | 2016-02-25 |
Attorney, Agent or Firm:
HAYAKAWA Yuzi et al. (JP)
Download PDF:
Previous Patent: SEMICONDUCTOR PROCESSING SHEET
Next Patent: POSITIVE ELECTRODE FOR LITHIUM ION SECONDARY BATTERIES, AND LITHIUM ION SECONDARY BATTERY
Next Patent: POSITIVE ELECTRODE FOR LITHIUM ION SECONDARY BATTERIES, AND LITHIUM ION SECONDARY BATTERY