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Patent Searching and Data


Title:
SEMICONDUCTOR PRODUCT AND FABRICATION PROCESS
Document Type and Number:
WIPO Patent Application WO/2019/100224
Kind Code:
A1
Abstract:
Processes(100) for fabricating a semiconductor product(200) and for forming a patterned stack with an aluminum layer(218) and a tungsten layer(216), include forming(104) a first dielectric layer(212) on a gate structure(204) and on first and second regions(208, 210) of a substrate(202), forming(108) a diffusion barrier layer(214) on the first dielectric layer(212), forming(110) a tungsten layer(216) on the diffusion barrier layer(214), forming(112) an aluminum layer(218) on the tungsten layer(216), forming(114) a hard mask layer(220) on the aluminum layer(218), forming(116) a patterned resist mask layer(222) which covers the hard mask layer(220) above the first region(208) and exposes the hard mask layer(220) above the second region(210), dry etching(118, 120) the hard mask layer(220) and the aluminum layer(218) above the second region(210) using the patterned resist mask layer(222), removing(122) the resist mask layer(222), and dry etching(124) the tungsten layer(216) using the hard mask layer(220) to expose the first dielectric layer(212) above the second region(210).

Inventors:
CHEN YAPING (CN)
YANG HONG (US)
ALI ABBAS (US)
ZUO CHAO (CN)
SRIDHAR SEETHARAMAN (US)
LIU YUNLONG (CN)
Application Number:
PCT/CN2017/112240
Publication Date:
May 31, 2019
Filing Date:
November 22, 2017
Export Citation:
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Assignee:
TEXAS INSTRUMENTS INC (US)
TEXAS INSTRUMENTS JAPAN LTD (JP)
CHEN YAPING (CN)
International Classes:
H01L21/768
Foreign References:
CN101399220A2009-04-01
CN107170678A2017-09-15
CN101286473A2008-10-15
CN101355048A2009-01-28
CN107221495A2017-09-29
US7442647B12008-10-28
Attorney, Agent or Firm:
JEEKAI & PARTNERS (CN)
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