Title:
SEMICONDUCTOR RECORDING DEVICE
Document Type and Number:
WIPO Patent Application WO/2014/045372
Kind Code:
A1
Abstract:
The objective of the present invention is, in a semiconductor recording device in which a plurality of memory cells are connected in series, to suppress the current supplied to recording elements from varying between layers. In the semiconductor recording device, a plurality of memory cells, which result from a transistor (2) and a recording element (1) being connected in parallel, are connected in series between a first signal line (VBL) and a second signal line (VWL), and the gate voltage (VG1, VG2, VG3, VG4) supplied to the transistors is caused to be progressively higher with proximity of the position at which the transistor is disposed to the second signal line.
Inventors:
SHIRAMIZU NOBUHIRO (JP)
HANZAWA SATORU (JP)
KOTABE AKIRA (JP)
HANZAWA SATORU (JP)
KOTABE AKIRA (JP)
Application Number:
PCT/JP2012/074080
Publication Date:
March 27, 2014
Filing Date:
September 20, 2012
Export Citation:
Assignee:
HITACHI LTD (JP)
International Classes:
H01L27/105; G11C13/00; H01L45/00
Foreign References:
| JP2011114016A | 2011-06-09 | |||
| JP2004272975A | 2004-09-30 | |||
| JP2012074542A | 2012-04-12 |
Attorney, Agent or Firm:
HIRAKI Yusuke et al. (JP)
Yusuke Hiraki (JP)
Yusuke Hiraki (JP)
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