Title:
SEMICONDUCTOR STORAGE DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR STORAGE DEVICE
Document Type and Number:
WIPO Patent Application WO/2022/091189
Kind Code:
A1
Abstract:
Provided is a semiconductor storage device that allows for an easy erasing operation. This semiconductor storage device comprises: a laminate of a plurality of conductive layers and a plurality of insulating layers; a core insulating layer; a semiconductor layer; and a memory layer provided between the semiconductor layer and the laminate in a first direction. The plurality of conductive layers include: a first selection gate line connected to a gate of a first selection transistor; word lines provided above the first selection gate line and connected to a gate of a memory transistor; and a second selection gate line provided above the word lines and connected to a gate of a second selection transistor. The core insulating layer has an upper surface lower than an upper surface of the second selection gate line with respect to a surface of a semiconductor substrate. The semiconductor layer includes: a first semiconductor part having respective channel-forming regions for the memory transistor and the first and second selection transistors; and a second semiconductor part provided on an upper surface of the core insulating layer. The first semiconductor part has an impurity semiconductor region that contains an impurity element and that overlaps the second selection gate line.
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Inventors:
TAKAYAMA KARIN (JP)
KANNO HIROSHI (JP)
TAKEKIDA HIDETO (JP)
KANNO HIROSHI (JP)
TAKEKIDA HIDETO (JP)
Application Number:
PCT/JP2020/040139
Publication Date:
May 05, 2022
Filing Date:
October 26, 2020
Export Citation:
Assignee:
KIOXIA CORP (JP)
International Classes:
H01L27/11582
Foreign References:
| JP2020506542A | 2020-02-27 | |||
| JP2012023091A | 2012-02-02 | |||
| JP2018142654A | 2018-09-13 |
Attorney, Agent or Firm:
SAKURA PATENT OFFICE, P.C. (JP)
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