Title:
SEMICONDUCTOR STRUCTURE ENHANCED FOR HIGH VOLTAGE APPLICATIONS
Document Type and Number:
WIPO Patent Application WO/2019/243882
Kind Code:
A3
Abstract:
A semiconductor structure enhanced for high-voltage applications is disclosed. The structure comprises a protruding wall structure, formed by etching a substrate, that extends from a base surface of the substrate. Corners of the protruding wall structure may be smoothed or rounded to reduce electrical stress within the structure. The protruding wall structure may be partitioned into multiple wall regions disposed along different directions of the substrate to reduce mechanical stress.
Inventors:
VOIRON FRÉDÉRIC (FR)
BUFFLE LARRY (FR)
BUFFLE LARRY (FR)
Application Number:
PCT/IB2019/000515
Publication Date:
February 13, 2020
Filing Date:
June 19, 2019
Export Citation:
Assignee:
MURATA MANUFACTURING CO (JP)
International Classes:
H01L27/02; H01L29/94; H01L49/02
Domestic Patent References:
WO2009150600A1 | 2009-12-17 |
Foreign References:
US20110244302A1 | 2011-10-06 | |||
US20110180931A1 | 2011-07-28 | |||
US20130161792A1 | 2013-06-27 |
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