Title:
SEMICONDUCTOR STRUCTURE HAVING AN INTEGRATED QUADRUPLE-WALL CAPACITOR FOR EMBEDDED DYNAMIC RANDOM ACCESS MEMORY (EDRAM) AND METHOD TO FORM THE SAME
Document Type and Number:
WIPO Patent Application WO/2012/177313
Kind Code:
A3
Abstract:
Semiconductor structures having integrated quadruple-wall capacitors for eDRAM and methods to form the same are described. For example, an embedded quadruple-wall capacitor includes a trench disposed in a first dielectric layer disposed above a substrate. The trench has a bottom and sidewalls. A quadruple arrangement of metal plates is disposed at the bottom of the trench, spaced apart from the sidewalls. A second dielectric layer is disposed on and conformal with the sidewalls of the trench and the quadruple arrangement of metal plates. A top metal plate layer is disposed on and conformal with the second dielectric layer.
Inventors:
DOYLE BRIAN S (US)
SHAH UDAY (US)
SURI SATYARTH (US)
CHEBIAM RAMANAN V (US)
SHAH UDAY (US)
SURI SATYARTH (US)
CHEBIAM RAMANAN V (US)
Application Number:
PCT/US2012/032064
Publication Date:
June 27, 2013
Filing Date:
April 04, 2012
Export Citation:
Assignee:
INTEL CORP (US)
DOYLE BRIAN S (US)
SHAH UDAY (US)
SURI SATYARTH (US)
CHEBIAM RAMANAN V (US)
DOYLE BRIAN S (US)
SHAH UDAY (US)
SURI SATYARTH (US)
CHEBIAM RAMANAN V (US)
International Classes:
H01L27/108; H01L21/8242
Foreign References:
| US20060134878A1 | 2006-06-22 | |||
| KR20070023164A | 2007-02-28 | |||
| US20100032801A1 | 2010-02-11 | |||
| KR20070116464A | 2007-12-10 | |||
| KR20100079205A | 2010-07-08 |
Attorney, Agent or Firm:
VINCENT, Lester J. et al. (Sokoloff Taylor & Zafman LLP,1279 Oakmead Parkwa, Sunnyvale California, US)
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