SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREFOR

Title:

SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREFOR

Document Type and Number:

WIPO Patent Application WO/2023/130489

Kind Code:

A1

Abstract:

The embodiments of the present disclosure are applied to the technical field of semiconductors. Provided are a semiconductor structure and a manufacturing method therefor. The semiconductor structure comprises: a semiconductor chip comprising a passivation layer and a protective layer, which are located on the chip, wherein the protective layer is located on the passivation layer; and recess structures comprising first recesses, wherein the first recesses expose a surface of the passivation layer. By means of the present solution, a binding force between a sealing layer and the semiconductor chip can be improved.

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Inventors:

LV KAIMIN (CN)

Application Number:

PCT/CN2022/071574

Publication Date:

July 13, 2023

Filing Date:

January 12, 2022

Export Citation:

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Assignee:

CHANGXIN MEMORY TECH INC (CN)

International Classes:

H01L23/31; H01L21/56

Foreign References:

US20120018875A1	2012-01-26
US20120018875A1	2012-01-26
US20070120269A1	2007-05-31
US20090032909A1	2009-02-05
US20070108623A1	2007-05-17
US20080073780A1	2008-03-27

Attorney, Agent or Firm:

PATENTSINO IP FIRM (CN)

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