Title:
SEMICONDUCTOR SUBSTRATE ASSEMBLY AND MANUFACTURING METHOD THEREFOR
Document Type and Number:
WIPO Patent Application WO/2022/255286
Kind Code:
A1
Abstract:
One embodiment of the present disclosure is a joined structure that comprises: a first substrate that has a first joined surface that has a first signal transmission metal region and a first ground metal region insulated from the first signal transmission metal region; and a second substrate that is joined to the first substrate and has a second joined surface that has a second signal transmission metal region and a second ground metal region that is insulated from the second signal transmission metal region. In the joined structure, the first signal transmission metal region and the second signal transmission metal region are joined and the first ground metal region and the second ground metal region are joined.
Inventors:
SUGA TADATOMO (JP)
OTSUKA KANJI (JP)
OTSUKA KANJI (JP)
Application Number:
PCT/JP2022/021865
Publication Date:
December 08, 2022
Filing Date:
May 30, 2022
Export Citation:
Assignee:
SUGA TADATOMO (JP)
OTSUKA KANJI (JP)
INST FOR ADVANCED MICRO SYSTEM INTEGRATION (JP)
OTSUKA KANJI (JP)
INST FOR ADVANCED MICRO SYSTEM INTEGRATION (JP)
International Classes:
H01L21/60
Domestic Patent References:
| WO2006129762A1 | 2006-12-07 |
Foreign References:
| JP2019140253A | 2019-08-22 | |||
| JP2007027472A | 2007-02-01 | |||
| JP2013251405A | 2013-12-12 |
Attorney, Agent or Firm:
AKATSU Takeshi (JP)
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