Title:
SEMICONDUCTOR SUBSTRATE, SEMICONDUCTOR SUBSTRATE LAMINATE, AND ENDOSCOPE
Document Type and Number:
WIPO Patent Application WO/2019/092938
Kind Code:
A1
Abstract:
Provided are a semiconductor substrate, a semiconductor substrate laminate, and an endoscope that are configured to enable further size reduction while preventing influences from the outside. A semiconductor substrate 100 comprises: a silicon wafer layer 102 on which a functional element 101 is formed; an interlayer insulation film 103; a first metal wiring layer 104 that is layered on the interlayer insulation film 103, and is electrically connected to the functional element 101; a first surface protective film 106; a through silicon via (TSV) 107 that is connected to the first metal wiring layer 104, is formed so as to penetrate from the rear surface of the first metal wiring layer 104 to the rear surfaces of the interlayer insulation film 104 and the silicon wafer layer 102, and is provided in a wall shape so as to surround the functional element 101; a second metal wiring layer 108 that is connected to the TSV 107, and is layered on the rear surface of the silicon wafer layer 102; and a second surface protective layer 110.
Inventors:
ADACHI SATORU (JP)
Application Number:
PCT/JP2018/028695
Publication Date:
May 16, 2019
Filing Date:
July 31, 2018
Export Citation:
Assignee:
OLYMPUS CORP (JP)
International Classes:
H01L27/146; A61B1/04; G02B23/24; H01L21/3205; H01L21/768; H01L23/522; H01L25/065; H01L25/07; H01L25/18
Foreign References:
| JP2010192561A | 2010-09-02 | |||
| JPH11145333A | 1999-05-28 | |||
| US20150279897A1 | 2015-10-01 | |||
| JP2013080838A | 2013-05-02 | |||
| JP2008177298A | 2008-07-31 | |||
| JP2007059676A | 2007-03-08 | |||
| JP2011003570A | 2011-01-06 |
Attorney, Agent or Firm:
SAKAI INTERNATIONAL PATENT OFFICE (JP)
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