SEMICONDUCTOR TESTING DEVICE, PERFORMANCE BOARD AND INTERFACE PLATE

WIPO Patent Application WO/2007/018081

A1

A semiconductor testing device (20) capable of collectively connecting different kinds of connectors on a performance board (200). The device comprises a test head body (100) containing a signal module (110) for generating a test signal used to test a device to be tested (10), an interface plate (200) electrically connected to a plate body (210) and the signal module (110), having a plurality of receptacles disposed on the plate body (210) and mounted on the test head body (100), and a performance board (300) having on one surface a connector fitted to and electrically connected with a receptacle, having on the other surface a testing socket (330) electrically connected with the connector and connected with the device to be tested (10), and mounted on the interface plate (200) by fitting the connector to a receptacle, the device further includes an elevating receptacle or a elevating connector to be displaced with respect to the plate body (210) in a direction in which the connector is inserted into or pulled out from a receptacle.

ITO, Yoshimasa (1-32-1 Asahi-cho, Nerima-k, Tokyo 71, 1790071, JP)
伊藤 良真 (〒71 東京都練馬区旭町１丁目３２番１号 株式会社アドバンテスト内 Tokyo, 1790071, JP)

JP2006/315239

February 15, 2007

August 01, 2006

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ADVANTEST CORPORATION (1-32-1, Asahi-cho Nerima-k, Tokyo 71, 1790071, JP)
株式会社アドバンテスト (〒71 東京都練馬区旭町１丁目３２番１号 Tokyo, 1790071, JP)
ITO, Yoshimasa (1-32-1 Asahi-cho, Nerima-k, Tokyo 71, 1790071, JP)

G01R31/28; G01R31/28

RYUKA, Akihiro (5F Shinjuku Square Tower, 22-1 Nishi-Shinjuku 6-chom, Shinjuku-ku Tokyo05, Tokyo1631105, JP)

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