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Patent Searching and Data


Title:
SEMICONDUCTOR WAFER TESTING APPARATUS
Document Type and Number:
WIPO Patent Application WO/2010/067491
Kind Code:
A1
Abstract:
Disclosed is a semiconductor wafer testing apparatus that resolves the following problems which arise when semiconductor wafers become larger: (1) complexity of stage acceleration/deceleration control; (2) throughput reduction; and (3) increased vibration of the stage support platform during the stage inversion operation (deterioration in resolution). In the semiconductor wafer testing apparatus for resolving these problems, a wafer is rotated, an electron beam is irradiated onto the rotating wafer from a scanning electron microscope, and secondary electrons emitted from the wafer are detected. The detected secondary electrons are A/D converted by an image processing unit, realigned by an image data realignment unit, and then image-processed for display. As a result, image information of all dies of a wafer can be acquired without a large amount of movement of the stage in the X and the Y directions.

Inventors:
TOBA TADANOBU (JP)
HIRANO KATSUNORI (JP)
SATO NORIO (JP)
OHASHI MASAHIRO (JP)
Application Number:
PCT/JP2009/004722
Publication Date:
June 17, 2010
Filing Date:
September 18, 2009
Export Citation:
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Assignee:
HITACHI HIGH TECH CORP (JP)
TOBA TADANOBU (JP)
HIRANO KATSUNORI (JP)
SATO NORIO (JP)
OHASHI MASAHIRO (JP)
International Classes:
H01L21/66; G01B15/00
Foreign References:
JP2001056306A2001-02-27
JP2003166809A2003-06-13
JP2007158099A2007-06-21
JPS62110248A1987-05-21
Attorney, Agent or Firm:
POLAIRE I. P. C. (JP)
Polaire Intellectual Property Corporation (JP)
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