| JP59145955 | DEVICE FOR MEASURING CHEMICAL SENSITIVE ELEMENT |
| JP63018260 | MANUFACTURE OF UREA SENSOR |
| JP04233448 | MANUFACTURE OF OXYGEN SENSOR |
ELWIN, Matthew Peter (53 Cherry Grove, Sketty, Swansea SA2 8AU, GB)
MAFFEIS, Thierry Gabriel Georges (70 Curry Close, Dunvant, Swansea SA2 7PJ, GB)
HOLLAND, Paul Michael (39 Llwynmawr Close, Sketty, Swansea SA2 9HD, GB)
IGIC, Petar (66 Ffordd Dryden, Killay, Swansea SA2 7PD, GB)
LORD Alexander Mark (25 Knoll Avenue, Uplands, Swansea SA2 0JE, GB)
WILKS, Stephen Patrick (86 Huntingdon Way, Sketty, Swansea SA2 9HN, GB)
ELWIN, Matthew Peter (53 Cherry Grove, Sketty, Swansea SA2 8AU, GB)
MAFFEIS, Thierry Gabriel Georges (70 Curry Close, Dunvant, Swansea SA2 7PJ, GB)
HOLLAND, Paul Michael (39 Llwynmawr Close, Sketty, Swansea SA2 9HD, GB)
IGIC, Petar (66 Ffordd Dryden, Killay, Swansea SA2 7PD, GB)
LORD Alexander Mark (25 Knoll Avenue, Uplands, Swansea SA2 0JE, GB)
| CLAIMS 1. A method of fabricating a sensor device from a substrate comprising a plurality of transistor components, at least one dielectric layer covering a plurality of said transistor components, a plurality of contact electrodes of a first conductive material for adjusting the respective voltages of a plurality of said transistor components, and at least one gate electrode arranged on at least one said dielectric layer, the method comprising: forming at least one trench in said substrate to expose at least one said gate electrode; forming a seed layer of a semiconductor material in at least one said trench; forming a plurality of elongate wires of said semiconductor material on said seed layer, wherein the wires extend from the seed layer; and forming at least one layer of a second conductive material, at ends of said elongate wires in at least one said trench. 2. A method according to claim 1, wherein at least one said layer of said second conductive material is formed by sputtering . 3. A method according to claim 1 or 2, further comprising forming at least one layer of said semiconductor material at ends of a plurality of said elongate wires remote from the corresponding said seed layer prior to formation of the corresponding said layer of said second conductive material. 4. A method according to claim 3, wherein at least one said layer of semiconductor material is formed by sputtering. 5. A method according to any one of the preceding claims, further comprising annealing at least one said layer of said second conductive material. 6. A method according to any one of the preceding claims, further comprising patterning and etching at least one said layer of second conductive material. 7. A method of fabricating a sensor device from a substrate comprising a plurality of transistor components, at least one dielectric layer covering a plurality of said transistor components, a plurality of contact electrodes of a first conductive material for adjusting the respective voltages of a plurality of said transistor components, and at least one gate electrode arranged on at least one said dielectric layer, the method comprising: forming at least one trench in said substrate to expose at least one said gate electrode at a location spaced from the transistor components corresponding to said gate electrode; forming a seed layer of a semiconductor material in at least one said trench; and forming a plurality of elongate wires of said semiconductor material on said seed layer, wherein the wires extend from the seed layer. 8. A method according to any one of the preceding claims, further comprising forming a plurality of said gate electrodes before formation of at least one said trench. 9. A method according to any one of the preceding claims, wherein said semiconductor material comprises zinc oxide. 10. A method according to any one of the preceding claims, wherein at least one said seed layer is formed by sputtering. 11. A method according to any one of the preceding claims, further comprising forming a respective barrier layer on a side of said respective dielectric layer remote from said transistor components prior to formation of said contact electrodes on said barrier layer, to resist diffusion of said first conductive material into said transistor components. 12. A method according to claim 11, wherein at least one said barrier layer includes a metal and/or a metal nitride. 13. A method according to any one of the preceding claims, wherein a plurality of said contact electrodes are formed on at least one respective poly-silicon gate layer formed on said respective dielectric layer. 14. A sensor device comprising: (i) a substrate comprising a plurality of transistor components, at least one dielectric layer covering a plurality of said transistor components, a plurality of contact electrodes of a first conductive material for adjusting the respective voltages of a plurality of said transistor components, at least one gate electrode arranged on at least one said dielectric layer, at least one trench formed in said substrate to expose at least one said gate electrode, and a seed layer of a semiconductor material in at least one said trench; (ii) a plurality of elongate wires of said semiconductor material on said seed layer, wherein the wires extend from the seed layer; and (iii) at least one layer of a second conductive material, having a melting point lower than the melting point of said first conductive material , at ends of said elongate wires in at least one said trench. 15. A device according to claim 14, further comprising at least one layer of said semiconductor material at ends of said elongate formations remote from the corresponding said support layer wherein at least one said layer of said second conductive material is formed on at least one said layer of said semiconductor material. 16. A sensor device comprising: (i) a substrate comprising a plurality of transistor components, at least one dielectric layer covering a plurality of said transistor components, a plurality of contact electrodes of a first conductive material for adjusting the respective voltages of a plurality of said transistor components, at least one gate electrode arranged on at least one said dielectric layer, and at least one trench formed in said substrate to expose at least one said gate electrode at a location spaced from the transistor components corresponding to said gate electrode, and a seed layer of a semiconductor material in at least one said trench; and (ii) a plurality of elongate wires of said semiconductor material on said seed layer, wherein the wires extend from the seed layer. 17. A device according to any one of claims 14 to 16, wherein said semiconductor material comprises zinc oxide. 18. A device according to any one of claims 14 to 17, further comprising a respective barrier layer on a side of said respective dielectric layer remote from said transistor components, to resist diffusion of said first conductive material into said transistor components. 19. A device according to claim 18, wherein at least one said barrier layer includes a metal and/or a metal nitride. |
The present invention relates to a sensor device and to a method of fabricating a sensor device and relates
particularly, but not exclusively, to a sensor device incorporating zinc oxide (ZnO) nanowires into a CMOS
structure .
There is presently significant research activity attempting to develop devices and sensors using nanowires. The primary advantageous properties of nanowires are (a) the enhanced sensitivity that can be achieved due to the
increased surface to volume ratio, (b) the novel quantum effects that arise and (c) the potential increase in device density. However, it is difficult to combine nanowire technology with conventional silicon architectures such as CMOS, as a result of which the cost of production of
electronic devices incorporating nanowires is very high and potentially involves significant modification of extremely expensive semiconductor fabrication plants.
There is presently significant interest in developing hybrid systems in which nanostructures are artificially interfaced with CMOS technology. However, it is difficult to integrate the nanostructures within the CMOS processing architecture, and research conducted in this area has either focused on attempts at lateral integration of nanowires on CMOS structures, or the development of nanowire growth techniques compatible with processing temperatures for CMOS. However, these arrangements suffer from the disadvantage of relying on random arrangements of nanowires or costly micro machining steps. For example, attempts to grow silicon nanowires using copper seed catalysts at a temperature compatible with aluminium CMOS fabrication (450°C) have shown that the array of nanowires emerging from the substrate is not ordered or uniform to any significant extent.
US 2006/0240588 discloses a process for fabricating a CHEMFET sensor device by growing zinc oxide nanowires on a zinc oxide seed layer on a gate electrode of a transistor. However, this arrangement suffers from the drawbacks that the manufacture of the device is difficult to reproduce because the nanowires of this device grow in random directions, and that the formation of the nanowires directly over the gate electrode of the device can under certain circumstances cause degradation of the transistor components located below the gate oxide layer.
Preferred embodiments of the present invention seek to overcome one or more of the above disadvantages of the prior art .
According to an aspect of the present invention, there is provided a method of fabricating a sensor device from a substrate comprising a plurality of transistor components, at least one dielectric layer covering a plurality of said transistor components, a plurality of contact electrodes of a first conductive material for adjusting the respective voltages of a plurality of said transistor components, and at least one gate electrode arranged on at least one said dielectric layer, the method comprising:
forming at least one trench in said substrate to expose at least one said gate electrode;
forming a seed layer of a semiconductor material in at least one said trench; W
-3- forming a plurality of elongate wires of said semiconductor material on said seed layer, wherein the wires extend from the seed layer; and
forming at least one layer of a second conductive material, at ends of said elongate wires in at least one said trench.
It is envisaged that in some situations the second conductive layer has a melting point lower than the melting point of said first conductive material. However this is not
necessarily so but what is important is that the nanowires are not damaged when the second conductive layer is formed at/over the ends of the nanowires.
By forming at least one layer of a second conductive material, having a melting point lower than the melting point of the first conductive material, at ends of the elongate wires in at least one trench, this provides the advantage of enabling electrical biasing along the length of the elongate wires by suitable biasing of the layer of second conductive material. This in turn enables the electrical operation of the sensor device, for example its signal to noise ratio, to be improved, while allowing improvement of the sensitivity of the sensor by enabling the elongate wires to be heated by applying a bias to the layer of second conducting material. In addition, the layer of second conductive material can be used to form a cover to the trench so that the sensor device has a channel through which material to be analysed, such as biological fluid, can be directed, and the elongate wires can be formed at higher temperatures than in existing processes by suitable choice of the first conductive material, as a result of which highly ordered elongate wires can be formed in a process compatible with existing CMOS manufacturing techniques, as well as BICMOS, BIPOLAR and BCD technologies. This provides the further advantage that the operation of the elongate wires is improved, and the elongate wires can be formed without the use of catalytic material. In addition, the fact that the wires are arranged in a substantially vertical manner improves the reproducibility of the device. The closed channel can also be accessed by dry etching to provide a selective path for the flow of gas or fluids for detection," enabling separate transistor structures to detect different species within an array of devices on a single chip.
Furthermore, the use of a biasing across the nanowires allows the wires to be heated to activate the sensors for gas detection. In addition to or as an alternative to activating sensors, the biasing also allows heating of the wires so that any contamination on the wires can be removed by the heating process .
At least one said layer of said second conductive material may be formed by sputtering.
The method may further comprise forming at least one layer of said semiconductor material at ends of a plurality of said elongate wires remote from the corresponding said seed layer prior to formation of the corresponding said layer of said second conductive material.
This provides the advantage of improving the ohmic contact between the semiconductor material and the second conductive material.
At least one said layer of semiconductor material may be formed by sputtering. This provides the advantage of improving the uniformity of the layer of second conductive material formed thereon. The method may further comprise annealing at least one said layer of said second conductive material.
This provides the advantage of optimising the contact resistance .
The method may further comprise patterning and etching at least one said layer of second conductive material.
According to another aspect of the present invention, there is provided a method of fabricating a sensor device from a substrate comprising a plurality of transistor
components, at least one dielectric layer covering a
plurality of said transistor components, a plurality of contact electrodes of a first conductive material for
adjusting the respective voltages of a plurality of said transistor components, and at least one gate electrode arranged on at least one said dielectric layer, the method comprising:
forming at least one trench in said substrate to expose at least one said gate electrode at a location spaced from the transistor components corresponding to said gate electrode; forming a seed layer of a semiconductor material in at least one said trench; and
forming a plurality of elongate wires of said semiconductor material on said seed layer, wherein the wires extend from the seed layer. By forming at least one trench in said substrate to expose at least one said gate electrode at a location spaced from the transistor components corresponding to said gate electrode, this provides the advantage of minimising the risk of degradation of the transistor components while forming the elongate wires.
The method may further comprise forming a plurality of said gate electrodes before formation of at least one said trench.
The semiconductor material may comprise zinc oxide.
At least one said seed layer may be formed by
sputtering.
This provides the advantage of enabling formation of a seed layer of highly uniform thickness, which in turn enables growth of high quality elongate wires and high quality interface conductivity.
The method may further comprise forming a respective barrier layer on a side of said respective dielectric layer remote from said transistor components prior to formation of said transistor components on said barrier layer, to resist diffusion of said first conductive material into said
transistor components. It is to be understood that by side, we mean not only the sides of a trench in the dielectric layer but moreover the base of the trench in the bottom of the contact.
At least one said barrier layer may include a metal and/or a metal nitride. A plurality of said contact electrodes may be formed on at least one respective poly-silicon gate layer formed on said respective dielectric layer.
According to a further aspect of the present invention, there is provided a sensor device comprising:
(i) a substrate comprising a plurality of transistor
components, at least one dielectric layer covering a
plurality of said transistor components, a plurality of contact electrodes of a first conductive material for
adjusting the respective voltages of a plurality of said transistor components, at least one gate electrode arranged on at least one said dielectric layer, at least one trench formed in said substrate to expose at least one said gate electrode, and a seed layer of a semiconductor material in at least one said trench;
(ii) a plurality of elongate wires of said semiconductor material on said seed layer, wherein the wires extend from the seed layer; and
(iii) at least one layer of a second conductive material at ends of said elongate wires in at least one said trench.
It is envisaged that the second conductive material has a melting point lower than the melting point of said first conductive material.
The device may further comprise at least one layer of said semiconductor material at ends of said elongate wires remote from the corresponding said seed layer wherein at least one said layer of said second conductive material is formed on at least one said layer of said semiconductor material . According to a further aspect of the present invention, there is provided a sensor device comprising:
(i) a substrate comprising a plurality of transistor
components, at least one dielectric layer covering a
plurality of said transistor components, a plurality of contact electrodes of a first conductive material for adjusting the respective voltages of a plurality of said transistor components, at least one gate electrode arranged on at least one said dielectric layer, and at least one trench formed in said substrate to expose at least one said gate electrode at a location spaced from the transistor components corresponding to said gate electrode, and a seed layer of a semiconductor material in at least one said trench; and
(ii) a plurality of elongate wires of said semiconductor material on said seed layer, wherein the wires extend from the seed layer. The semiconductor material may comprise zinc oxide.
The device may further comprise a respective barrier layer on a side of said respective dielectric layer remote from said transistor components, to resist diffusion of said first conductive material into said transistor components.
At least one said barrier layer may include a metal and/or a metal nitride. A preferred embodiment of the invention will now be described, by way of example only and not in any limitative sense, with reference to the accompanying drawings, in which: Figure 1 is a partially cut away schematic view of a sensor device embodying the present invention;
Figure 2 to 6 show the steps of formation of the device of Figure 1; and
Figure 7 is a scanning electron microscope image of zinc oxide (ZnO) nanowires formed on a silicon substrate and zinc oxide support layer.
Referring to Figure 1, a CMOS/ZnO nanowire hybrid gas sensor 2 embodying the present invention has source 4 and drain 6 regions formed in a silicon substrate 8. The active area of the device, embodying the source 4 and drain 6 regions is surrounding by a field oxide layer 10. Source 12 and drain 14 electrodes having respective contact portions 16, 18, which are formed from tungsten and are in electrical contact with respective silicon layers. A poly-silicon gate layer 24 is formed in the active layer which is cut out of the field oxide 10 (standard technology) and extends onto the field oxide 10 for the nanowire contact or indeed the
standard gate contact. A gas flow channel 26 is arranged on the gate layer 24 and consists of a zinc oxide (ZnO) support layer 28 (Figure 3) from which highly ordered zinc oxide nanowires 30 extend (Figure 5), the nanowires 30 being covered with an aluminium gate contact layer 32 (Figure
6). The support layer 28 acts as a seed layer from which the nanowires can grow. The gas flow channel 26 has open ends so that gas can flow into the channel 26 and change the
resistance of the zinc oxide nanowires 30.
Referring to Figures 2 to 6, the formation of the device 2 of Figure 1 will now be described. The representation on the left hand side of Figure 2 is a standard gate contact on polysilicon over field oxide and the representation on the right shows the formation of the nanowire trench, which can have a top metal layer.
As shown in Figure 2, a dielectric layer 34 is formed over the polysilicon gate layer 24, and apertures 36 are provided over the standard gate polysilicon and the source and drain layers 4, 6 (see Figure 1) . The contact portions 16, 18 (as shown in Figure 1) and the standard gate electrode 20 (shown in Figure 2) are formed in the apertures 36. Initially, a Ti/TiN barrier layer (not shown) is deposited into each of the apertures 36 to prevent diffusion of tungsten material into the silicon of the source and drain regions 4, 6 during subsequent nanowire growth. The source and drain electrodes 12, 14 (as shown in Figure 1) are then formed by chemical vapour deposition of tungsten into the apertures 36 onto the barrier layer.
Referring now to Figure 3, photoresist material 38 is then coated onto the dielectric material 34 and etched away over the poly-silicon gate layer 24 to form a nanowire trench 40. The uniform zinc oxide seed layer 28 is then formed over the poly-silicon gate layer 24 and the remaining photoresist material 38 by means of sputtering.
Referring to Figure 4, the photoresist 38 is removed and the zinc oxide seed layer 28 in regions other than the nanowire trench 40 is removed, and the zinc oxide nanowires 30 are then grown on the zinc oxide seed layer 28 in the nanowire trench 40 (Figure 5) by means of a horizontal tube furnace heated to 1050 to 1150 degrees Celsius, depending on the particle size of the materials used, using the vapour transfer method, as will be familiar to persons skilled in the art. The substrate is placed in a region at temperature 600 to 650 degrees Celsius, and the zinc oxide vapour is carried downstream by a flow of argon gas where it condenses on the zinc oxide seed layer 28 at around 600°C to form highly ordered nanowires 30, without the use of a catalyst. A scanning electron microscope image of highly ordered zinc nanowires formed using the process of Figures 2 to 6 is shown in Figure 7.
Referring now to Figure 6, zinc oxide is sputtered on top of the ends of the nanowires 30 remote from the seed layer 28 such that the sputtered zinc oxide forms grains at the tops of the nanowires 30 until a continuous film (not shown) is formed without depositing down the side walls or reaching the seed layer 28. The aluminium contact layer 32 is then deposited on top of the zinc oxide layer by means of sputtering . It will be appreciated the persons skilled in the art that the above embodiment has been described by way of example only, and not in any limitative sense, and that various alterations and modifications are possible without departure from the scope of the invention as defined by the appended claims.
Furthermore it is to be. understood that although individual embodiments of the invention are discussed the invention also covers a combination of any of the individual embodiments.
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