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Title:
SEQUENCE GENERATION AND DETECTION
Document Type and Number:
WIPO Patent Application WO/2011/023963
Kind Code:
A1
Abstract:
The invention is concerned with the construction and detection of sequences of symbols containing sub-sequences which satisfy a unique equation which is defined in one or more transmitters and at least one receiver. Symbols may be binary or non binary and the unique equation may be based on a logic function or a function using Galois field arithmetic. Multiple transmitters using distinct sequences may communicate or send remote commands to a receiver which only needs to employ a single detector. A feature of the invention is that by providing a counter which counts the number of times sub-sequences of a received sequence satisfy the unique equation and comparing the counter state with a threshold a reliable means of sequence detection is provided even in the presence of received symbol errors. It is shown in one embodiment that asynchronous detection may be used avoiding the need for clock recovery. Additionally the invention provides a flexible means of increasing the robustness of sequence detection.

Inventors:
TOMLINSON, Martin (The Old Coach House, Tristford HarbertonTotnes, Devon TQ9 7RZ, GB)
TJHAI, Cen Jung (59 Clifton Place, Plymouth, Devon PL4 8HY, GB)
Application Number:
GB2010/001626
Publication Date:
March 03, 2011
Filing Date:
August 27, 2010
Export Citation:
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Assignee:
TOMLINSON, Martin (The Old Coach House, Tristford HarbertonTotnes, Devon TQ9 7RZ, GB)
TJHAI, Cen Jung (59 Clifton Place, Plymouth, Devon PL4 8HY, GB)
International Classes:
H03M7/00
Attorney, Agent or Firm:
MUSKER, David Charles et al. (RGC Jenkins & Co, 26 Caxton Street, London SW1H ORJ, GB)
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Claims:
CLAIMS

1. A method of data processing, comprising:

selecting, from a signal received at a receiver containing a sequence of symbols, one or more sub-sequences of symbols;

determining whether each selected sub-sequence of symbols satisfies a first relationship;

counting the number of times that the sub-sequences of symbols satisfy the first relationship;

comparing the count with a pre-determined threshold; and

determining, based on the comparison, whether the signal was intended for that receiver, and/or whether the signal was successfully received. 2. The method of claim 1, wherein at least one sub-sequence of symbols included in the transmitted signals satisfies a second relationship and the first relationship is derived from the second relationship.

3. A method of data communication, comprising:

receiving one or more signals from one or more transmitters, each signal containing a sequence of symbols, and each sequence of symbols containing one or more sub-sequences of symbols; and

for each received signal, performing a method as set forth in claim 1 or claim 2. 4. A method of preparing a signal for transmission, comprising:

pre-loading an initial sequence of symbols, the initial sequence of symbols including one or more sub-sequences of symbols;

selecting a first sub-sequence of symbols;

for the selected first sub-sequence of symbols,

calculating a coefficient (cm) by running the selected first sub-sequence of symbols through a specific equation, and

appending the calculated coefficient (cm) to the initial sequence of symbols to produce an intermediate sequence of symbols; a) selecting a further sub-sequence of symbols from the intermediate sequence of symbols; and

for the selected further sub-sequence of symbols,

i). calculating a further coefficient (cm+)) by running the selected further sub- sequence of symbols through the specific equation, and

ii). appending the calculated further coefficient (cm+i) to the intermediate sequence of symbols.

5. The method of claim 4, further comprising recursively performing steps (a), (i), and (ii) for a predetermined number of times.

6. The method of any of claims 3 to 5, further comprising transmitting the or each signal.

7. A data processing device, comprising:

means for pre-loading an initial sequence of symbols, the initial sequence of symbols including one or more sub-sequences of symbols;

means for selecting a first sub-sequence of symbols;

means for calculating, for the selected first sub-sequence of symbols, a coefficient (cm) by running the selected first sub-sequence of symbols through a specific equation, and for appending the calculated coefficient (cm) to the initial sequence of symbols to produce an intermediate sequence of symbols;

means for selecting a further sub-sequence of symbols from the intermediate sequence of symbols; and

means for calculating, for the selected further sub-sequence of symbols, a further coefficient (cm+i) by running the selected further sub-sequence of symbols through the specific equation, and for appending the calculated further coefficient (cm+i) to the intermediate sequence of symbols.

8. A communications apparatus, comprising:

a device in accordance with claim 7; and

a transmitter arranged to transmit data produced thereby.

9. A data processing device, comprising:

means for selecting one or more sub-sequences of symbols from a sequence of symbols contained in a signal received at a receiver;

means for determining, for each selected sub-sequence, whether the selected sub- sequence of symbols satisfy a first equation;

means for counting the number of times that the sub-sequences of symbols satisfy the first equation;

means for comparing the count with a pre-determined threshold; and

means for determining, based on the comparison, whether the signal was intended for the receiver or whether the signal was successfully received.

10. A communications apparatus, comprising:

a receiver; and

a device in accordance with claim 9.

1 1. A communication system, comprising:

one or more transmitters operable to transmit signals, each signal containing a sequence of symbols, and each sequence of symbols containing one or more sub-sequences of symbols; and

an apparatus in accordance with claim 10.

12. A system in which;

one or more transmitters send different and distinct sequences of symbols such that there are sub-sequences of symbols which satisfy a unique equation; and;

a receiver carries out a count of the number of times sub-sequences of symbols satisfy the unique equation and compares this count to a threshold in order to detect that a communication signal with these properties has been received.

13. A system according to claim 12 in which the symbols are binary symbols.

14. A system according to claim 13 in which the sub-sequences of bits satisfy a unique equation involving a logic function of the bits in each sub-sequence.

15. A system according to claim 13 in which the sub-sequences of bits satisfy a unique equation concerning the parities of the bits in each sub-sequence.

16. A system according to claim 12 in which the symbols are non-binary symbols from a Galois Field, and the sub-sequences of symbols satisfy a unique equation using arithmetic rules of the Galois field.

17. A system according to any one of claims 12 to 16, in which:

the receiver operates asynchronously and oversamples the received symbols at a rate which is nominally an integral multiple of the symbol clock frequency of the transmitter, and; a count of the number of times the unique equation is satisfied is compared to a threshold in order to detect that a communication signal with these properties has been received. 18. A system according to any one of claims 12 to 17, in which the duration of the transmission of the different and distinct sequences of symbols containing sub-sequences of symbols which satisfy a unique equation is increased or decreased in accordance with the symbol error rate experienced by the receiver and in which a corresponding increase or decrease of the threshold setting is made in the receiver so as to maintain the reliability of sequence detection.

19. A data communications system comprising a system according to any one of claims 12 to 18 in which the transmitted sequences carry transmitted information. 20. A remote control system comprising a system according to any one of claims 12 to 18, in which the transmitted sequences carry remote control commands.

21. A receiver for a system according to any of claims 12 to 20.

Description:
SEQUENCE GENERATION AND DETECTION

Field of the Invention

This invention is concerned with detection of sequences of data and generation of those sequences, and with transmission and reception systems for such sequences; more par- ticularly but not exclusively, to systems involving the transmission of data or remote command and control in which one or more transmitters send different sequences which are to be reliably detected by one or more receivers.

Background Art

Data symbols, which may be binary symbols or symbols from a larger alphabet, may be transmitted and received using techniques which are standard practice in data communications. For example see the textbooks J.G.Proakis, Digital Communications, McGraw-Hill, 1997 and L. W. Couch, Digital and Analog Communication Systems, Prentice Hall, 1997. Apparatus such as a remote control transmits one of a plurality of commands as one or more such symbols. Where multiple transmitters are present, it may be desirable for one or more receivers to detect such symbols only from one (or a subset) of such transmitters. One system in which embodiments of the invention may be used is shown by way of example in Figure 1. There are 8 transmitters, 4 of the transmitters TxI to Tx4 are in the same first Group, B, and the other 4 of the transmitters Tx5 to Tx8 are in a second Group, A. Each of the transmitters is assigned a unique and distinct sequence of symbols with which to send to the receiver, RxI using a common transmit frequency.

Disclosure of the Invention

In accordance with an aspect of the invention, there is provided a method of preparing a signal for transmission. According to this method, an initial sequence of symbols including one or more sub-sequences of symbols is pre-loaded into a buffer memory. A first sub-sequence of symbols is then selected; for the selected first sub-sequence of symbols, a coefficient (cm) is calculated by running the selected first sub-sequence of symbols through a specific equation, and the calculated coefficient (cm) is appended to the initial sequence of symbols to produce an intermediate sequence of symbols. Subsequently, a further sub-sequence of symbols is selected from the intermediate sequence of symbols; for the selected further sub-sequence of symbols, a further coefficient (cm) is calculated by running the selected further sub-sequence of symbols through the specific equation, and the calculated further coefficient (cm) is appended to the intermediate sequence of symbols.

After receiving such signals prepared by this method, a receiver can then select the sub-sequences of symbols contained in the signals and check whether they satisfy an equa- tion derived from, or same as, the equation used to calculate the coefficients. Based on such evaluation of the sub-sequences, the receiver can determine whether the signals are intended for the receiver, or where they are intended for the receiver, whether they have been received correctly. In accordance with another aspect of the invention, there is provided a method of communication. According to this method, a signal containing a sequence of symbols is received at a receiver. The sequence of symbols includes one or more sub- sequences of symbols. The one or more sub-sequences of symbols are then selected. Each selected sub-sequence of symbols is then checked to determine whether it satisfies a specific equa- tion. The number of times that the sub-sequences of symbols satisfy the first equation is counted, and the count is compared with a pre-determined threshold. Based on the comparison, it can then be determined whether the signal was intended for the receiver or whether the signal has been successfully received. In accordance with a further aspect of the invention, there is provided a communication device, comprising means for pre-loading an initial sequence of symbols, the initial sequence of symbols including one or more sub-sequences of symbols; means for selecting a first sub-sequence of symbols; means for calculating, for the selected first sub-sequence of symbols, a coefficient (cm) by running the selected first sub-sequence of symbols through a specific equation, and for appending the calculated coefficient (cm) to the initial sequence of symbols to produce an intermediate sequence of symbols; means for selecting a further sub-sequence of symbols from the intermediate sequence of symbols; and means for calculating, for the selected further sub-sequence of symbols, a further coefficient (cm) by running the selected further sub-sequence of symbols through the specific equation, and for appending the calculated further coefficient (cm) to the intermediate sequence of symbols.

In accordance with a further aspect of the invention, there is provided a communication device, comprising means for selecting one or more sub-sequences of symbols from a sequence of symbols contained in a signal received at a receiver; means for determining, for each selected sub-sequence, whether the selected sub-sequence of symbols satisfy a first equation; means for counting the number of times that the sub-sequences of symbols satisfy the first equation; means for comparing the count with a pre- determined threshold; and means for determining, based on the comparison, whether the signal was intended for the receiver or whether the signal was successfully received.

In accordance with yet a further aspect of the invention, there is provided a system in which one or more transmitters send different and distinct sequences of symbols. The different and distinct sequences of symbols include sub-sequences of symbols which satisfy a unique equation. A receiver carries out a count of the number of times sub-sequences of symbols satisfy the unique equation and compares this count to a threshold in order to decide that a communication signal with these properties has been received.

Advantages of the Invention

One objective which preferred embodiments of the invention satisfy is that only a single detector is used in the receiver, RxI, to detect, with high reliability a received sequence resulting from a transmission by any of the transmitters in Group A despite the sequences being different and also to reject, with high reliability a received sequence from any of the transmitters in Group B. Similarly a separate detector is used in the receiver, RxI, to detect, with high reliability a received sequence resulting from a transmission by any of the transmitters in Group B. This detector also rejects, with high reliability a received sequence from any of the transmitters in Group A.

Any of the transmitters in Group A, or Group B can communicate to the receiver, FLxI, by sending a data message consisting of a regular stream of O's and l's in which a 1 is interpreted as the transmission of a sequence which can be detected by RxI and a 0 is interpreted as a non transmission. Another application is remote control in which the command is the sending of a sequence by any of the transmitters in Group A, or Group B, which is detected by the receiver RxI. Other advantages will be apparent from the following description and drawings.

Brief Description of the Drawings

Embodiments of the invention will now be described, by way of example only, with reference to the accompanying drawings in which:

Figure 1 is a block diagram showing an outline system featuring different transmitters and one receiver (usable in the prior art as well as the invention);

Figure 2 is a block diagram showing a detector for detecting sequences containing subsequences satisfying a unique equation according to a preferred embodiment, and for use within a receiver in the system of Figure 1;

Figure 3 is a block diagram showing an encoder for generating sequences according to a preferred embodiment, and for use within a transmitter in the system of Figure 1;

Figure 4 is an example of the encoder output with initial sequence 1110100;

Figure 5 is an example of the encoder output with initial sequence 1111110;

Figure 6 is an example of the detector output for a correct sequence 111010010110001110110101111 and a wrong sequence 101110100100111100100101010;

Figure 7 is an example of the detector output for a wrong sequence 101101011101011100001110101 and a correct sequence 111111010101001110000100100;

Figure 8 is an example of the detector output in the events of sampling errors and a short error burst;

Figure 9 is a block diagram showing a general encoder for generating a sequence with sub-sequences satisfying a unique equation according to the preferred embodiment of the invention; and Figure 10 is a block diagram showing an adaptive system for maintaining reliability of detection of sub-sequences satisfying a unique equation.

Description of Preferred Embodiments

In order to achieve the above objects, the sequences which are transmitted are composed of sub-sequences which have a common feature in that they satisfy a logical equation relating the symbols in each sub- sequence. Taking the case of an example using binary symbols the sequence:

^ x = 111010010110001110110101111 denoted as CQ, C 1 , C 2 , C 3 , C 4 , C 5 , c^, C 7 , Cg, C9, C 1 Q, .• . , c 26 satisfies the logical equation that

On = Cm-I ° C 7n -I O ( (c m _ 5 + C m _ 6 ) O C 771-7 + C 77 ^ 7 O C 771-5 O C, n _ 6 (1 )

+ C 7n -I O C 774 _ 2 O ( (C 771-5 + C 77J-6 ) O C 77J-7 + C 77J-5 O C 77J-6 O for m = 7 to 26. where o represents the AND function, φ represents the Exclusive OR function and + represents the OR function.

Equivalently stated

C 7n φ {Cni- S + Cjn-e) Φ Cm-7 Φ 1 (2)

Similarly the distinct sequence y 2 = 111111010101001110000100100 also satisfies the same logical equation. Rearranging the terms in equation (2)

C 77J e C 771-1 o C 7 ^ φ (C 771-5 + C 771 ^ 6 ) Θ c m _ 7 = 1 (3)

A detector for detecting either sequence S^ or ^ 2 is shown in Figure 2 provided that equation (3) has been stored in Evaluate equation. The received symbols are stored in a Buffer Memory from which sub-sequences are selected by Sub-sequence select. For each sub-sequence selected the unique equation given by equation (3) is checked. Only if the equation is satisfied is Counter equation satisfied incremented The Count of the Counter equation satisfied is compared to Threshold and if greater than Threshold either the sequence 5? \ or the sequence S^i is declared to have been detected If any bits are received in error then the unique equation may not be satisfied for those sub-sequences in which these bit errors occur and the Counter equation satisfied may not be incremented Provided an excessive number of bit errors have not been received, successful detection of the sequence S? \ or the sequence J^ 2 will be completed

The generator for generating either sequence =5^ or the sequence ^ 2 is shown in in Figure 3 To generate the sequence SP x the Initial fill 1110100 is used which is loaded into the Buffer memory Alternatively to generate the sequence ^ 2 the Initial fill 1111110 is used which is loaded into the Buffer memory Sub-sequences are selected sequentially using Sub- sequence select under control fiom the Sequencer For each sub- sequence selected the coefficient c is calculated according to equation (2) foi m = 7 through to m = 26 and each time the coefficient is loaded into Buffer memory to produce the required entire 27 bit sequence

Figiues 4 and 5 show the operation of the sequence encodei described aboλ'e implemented using a Field Piogrammable Gate Array It is assumed that, for Figures 4 and 5, the buffer memory was pre-loaded with initial sequences of 1110100 and 1111110 iespec- tively The output sequence appears at the SEQ.OUT pin

Figuies 6 to 8 show the operation of the example sequence detector also implemented using a Field Programmable Gate Array In this implementation, the detector opeiates m asynchronous mode and oversamples the received sequence at a rate which is 8 times higher than the clock frequency of the encoder As one effect of oversamphng is to replicate subsequences, the number of times the unique equation is satisfied, in the absence of received errors, is multiplied by 8 The notation used in these figures are as follows

• CLOCK oversampled clock running at the detector

• INPUT received sequence

• EQN_OUT output of the evaluate equation block

• CNT-OUT output of the counter equation satisfied block • DET_OUT : output of the comparator block, i.e counter > threshold block Figure 6 considers the detector's output when a correct sequence, υ is received

V = Sf x and a wrong sequence, υ', where v = 101110100100111100100101010, is received. Such a sequence may be received due to the effects of random noise or interference. As shown in Figure 6, for a correct input sequence containing sub-sequences satisfy- ing the unique equation, equation (2), the detector produces a logic high at DETX)UT to indicate that a correct sequence has been received. For a wrong input sequence containing sub-sequences not satisfying the unique equation, equation (2), DET_OUT pin stays at logic low indicating that the received sequence is incorrect. The DET-OUT pin will go to logic high as soon as the number of satisfied equations goes above a given threshold and will go to logic low as soon as this number is below the threshold.

Figure 7 shows another example of the detector's output when a wrong sequence or a correct sequence is input to the detector. As shown, the DET-OUT pin stays low for the wrong received sequence and produces a high logic signal for a correct received sequence. In Figure 7, the correct sequence w input to the detector is w = y 2 and the wrong sequence ιυ' is w' = 101101011101011100001110101 Both Figures 6 and 7 consider an ideal sampling scenario in which, due to oversampling, a bit contains 8 samples of the same logic level, i.e bit 0 contains 8 consecutive logic low samples and bit 1 contains 8 consecutive logic high samples. In practice, such an ideal sampling scenario does not always happen. The first sequence in Figure 8 shows the detector's output in the presence of sampling errors and as a result, each bit in the INPUT pin does not always have 8 samples of the same logic level. The effect of the sampling errors can be clearly observed at the output of EQN-OUT pin. The second sequence in Figure 8 contains a short burst of errors which affects the second, third and fourth positions of the received sequence. As shown in Figure 8, the detector still produces correct outputs demonstrating that the decoder is robust against this type of errors. It is worth mentioning that Figures 6 to 8 were produced using the same detector.

A generalised encoder is shown in Figure 9. The encoder produces an output sequence of symbols which may be binary symbols or multi-valued symbols such as from a Galois field. An example of a Galois field of size 16 is given in Table 1, where a is a primitive root of unity.

Before the output sequence is generated, the encoder is initialised with a unique equa- tion. As shown in Figure 9 the unique equation is input into Evaluate C 7n . An example of a unique equation for the Galois field of size 16 given in Table 1 is

C 1n = a X C n - X + C m _ 5 (4) where + now represents addition and x represents multiplication using Galois field arithmetic.

Also the encoder is initialised with a fill of initial symbols represented by S \ , S2, S 3 , . . . as shown in Figure 9. The first symbols of the generated sequence are these symbols and changing these symbol values produces different sequences, but all sequences consist of sub-sequences that satisfy the unique equation. An example for the fill of initial symbols for the Galois field of size 16 is a 3 ,a u ,a ύ .a 0 ,a 7 . These symbols are input into Buffer memory as shown in Figure 9. Under operation from Sequencer, Sub-sequence select first selects C 0 and C 4 which are a 3 and α 7 respectively, and Evaluate coefficient C 7n uses the unique equation, equation (4), to determine C 5 which is a 7 x a + a 3 = a 13 and this symbol is input to Buffer memory. Again, under operation from Sequencer, Sub- sequence select then selects C 1 and C 5 and Evaluate coefficient c m produces CQ— α 10 which is input to Buffer memory. Similarly C7 = α 10 which is input to Buffer memory. The overall output sequence under operation from Sequencer is a 3 π 5 5 7 13 10 ,a 3 ,a 8 ,. . ..

The decoder shown in Figure 2 may be used to detect this example sequence of α 3 , α^ ^ α 5 , α 7 , α 13 , α 10 , α 3 , αV . .

or any other sequence consisting of sub-sequences satisfying the unique equation, equation (4). In this example, Evaluate equation contains the unique equation, equation (5), a° = 1

a 1 = a

or 9 = a 7 1

a 3 = α 3

a 4 = 1 + α

a 5 = a + a 2

α 6 z= a 2 + a 3

a 7 = 1 + a + a 3

a 8 = 1 + a 2

a 9 = a + a 3

a 10 = 1 + a + a 2

a 11 = a + a 2 + a 3

a n = 1 + a + a 2 + a 3

cv 13 - 1 + a 2 + a 3

a 14 = 1 + a 3

zero= 0

Table 1: Table of Galois field elements of size 16.

derived from equation (4) .

Cr 11 + a X Cm-I + C m _ 5 = 0 (5)

Sub-sequence select, selects C 7n , C n ^i and c, n _ 5 , sequentially for m = 5 onwards and

Evaluate equation checks whether or not equation (5) is satisfied. If the equation is sat- isfied, Counter equation satisfied is incremented. If the equation is not satisfied, Counter equation satisfied is not incremented. Threshold is pre-set with a number, for example

Threshold may be pre-set with the number 17. In this case, Count > Threshold checks whether Counter equation satisfied is greater than 17. If Counter equation satisfied is greater than 17, then at least 18 sub-sequences within the received sequence satisfied equation (5) and as a consequence Sequence detected is output from the detector.

In this example the Galois field is of size 16. Any size of Galois field may be used provided suitable arrangements for the transmission and reception of the Galois field symbols have been made according to standard transmission and reception practice. A Galois field of size 2 corresponds to binary symbols and in this case addition is modulo 2 and the unique equation is an equation relating the parities of the bits in each subsequence. An example of such an equation is given in equation (6). Cm = Cm-i + C 7n ^ 6 + 1 (6) where + is addition carried out modulo 2.

The general encoder shown in Figure 9 may be used to generate sequences consisting of sub-sequences satisfying equation (6) provided that this unique equation has been input. With an initial fill of symbols of 101110 the encoder will produce the sequence 10111001111011 . . .

The general decoder shown in Figure 2 may be used to detect this sequence provided the unique equation relating the parities of the received bits defined by equation (7) has been embedded in Evaluate equation of Figure 2. Equation (7) follows from equation (6) and is defined as

c m -f C 1n ^i + c, re _ 6 = 1 (7)

The reliability of detection depends upon the number of sub-sequences received that satisfy the unique equation and also depends upon the threshold setting. For a given symbol error rate each symbol error can cause up to t sub-sequences not satisfying the unique equation where t is the number of independent terms in the unique equation. Accordingly the reliability of detection is increased by minimising t, the number of independent terms in the unique equation and by increasing the threshold setting which necessitates increasing the number of sub-sequences transmitted. The number of sub-sequences transmitted is equal to the length of the transmitted sequence, in symbols, minus the length of each sub-sequence.

Shown in Figure 10 is an adaptive system in which the length of the transmitted sequence is increased in response to an increase in symbol error rate. In this embodiment of the invention the length in symbols of the transmitted sequence is adjusted to be significantly greater than the Threshold. In the absence of symbol errors, following the transmission of the sequence, the Counter equation satisfied is equal to the number of sub-sequences transmitted which is equal to the length in symbols of the transmitted sequence minus the sub-sequence length in symbols. After a suitable period following detection, the Count of the Counter equation satisfied is compared to the Threshold. If the result is a small number then this represents reduced margin due to the occurrence of symbol errors. By using the feedback channel as shown in Figure 10 the duration of the transmitted sequence may be increased so as to increase the Count of the Counter equation satisfied compared to the Threshold following the next transmission of the sequence. In this way the duration of each transmitted sequence may be increased or decreased so as to maintain a level of reliability of detection. This type of adaptive system is of course only appropriate if sequence detection is used repeatedly as part of a communication system or a remote control system featuring repeated commands. The invention may be implemented for wireless communication systems but other applications include audio, ultrasonic, optical and cable based communication systems. The processing hardware may be provided by a dedicated chipset, by suitably programmed Digital Signal Processing chips or. if the bandwidth allows, by general purpose microprocessors. It will be apparent that many variations and modifications may be made to the above-described embodiments. Further references which may assist in putting the invention into practice are:

F.J.MacWilliams and N.J.A.Sloane, The Theory of Error Correcting Codes, North HoI- land, 1977

S. Lin and D.J. Costello Jr., Error Control Coding, ed., Pearson Prentice Hall, 2004

Industrial Application

One particular application may be the provision of remote controls for internet radio sys- terns, in which different computers or other terminals acting as internet radio receivers are controlled to select channels, as well as for other functions such as volume, by transmitters sending predetermined sequences according to the invention.




 
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