Title:
SHIFT REGISTER CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2016/155057
Kind Code:
A1
Abstract:
A shift register circuit (1), comprising M levels of shift register sub-circuits. An Nth level shift register sub-circuit (10) comprises an Nth level control signal input end (G(N-1)), a clock signal output control circuit (110), a buffer (120) and an Nth level signal output end (G(N)) which are sequentially and electrically connected; the Nth level control signal input end (G(N-1)) receives an output signal of an (N-1)th level shift register sub-circuit; a first transistor (T1) receives a first clock signal (CK1), and the first transistor (T1) transmits the output signal of the (N-1)th level shift register sub-circuit to a node (Q(N)) under the control of the first clock signal (CK1); a second transistor (T2) receives a second clock signal (CK2), and the second transistor (T2) transmits the second clock signal (CK2) to a source electrode (S2) of the second transistor (T2) under the control of the output signal of the (N-1)th level shift register sub-circuit (10); the source electrode (S2) of the second transistor (T2) serving as an output end of the clock signal output control circuit (110) is electrically connected to the buffer (120); and the buffer (120) buffers an output signal for a pre-set time to obtain an output signal of the Nth level shift register sub-circuit and outputs same.
Inventors:
DAI CHAO (CN)
Application Number:
PCT/CN2015/077167
Publication Date:
October 06, 2016
Filing Date:
April 22, 2015
Export Citation:
Assignee:
SHENZHEN CHINA STAR OPTOELECT (CN)
International Classes:
G11C19/28
Foreign References:
| CN103295511A | 2013-09-11 | |||
| CN1866404A | 2006-11-22 | |||
| CN102771114A | 2012-11-07 | |||
| CN103956133A | 2014-07-30 | |||
| US20150029082A1 | 2015-01-29 | |||
| CN103460602A | 2013-12-18 | |||
| CN103985341A | 2014-08-13 |
Attorney, Agent or Firm:
GUANGZHOU SCIHEAD PATENT AGENT CO., LTD (CN)
广州三环专利代理有限公司 (CN)
广州三环专利代理有限公司 (CN)
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