Title:
SHIFT REGISTER CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2016/190186
Kind Code:
A1
Abstract:
Provided is a shift register circuit allowing malfunctions due to a threshold shift in a thin-film transistor caused by external light to be prevented. A unit circuit constituting each stage of a shift register circuit includes a plurality of thin-film transistors. The plurality of thin-film transistors is classified into a first group (T2, T4, T9) in which the on and off states are controlled by a relatively high on-duty, and a second group (T1, T3, T5, T6, T7, T8) in which the on and off states are controlled by a relatively low on-duty. In this configuration, a light shielding film (LS) is provided only on a thin-film transistor included in either the first group or the second group.
Inventors:
FURUTA SHIGE
YAMAGUCHI TAKAHIRO
YAMADA JUNICHI
YAMANAKA HIDEKAZU
SASAKI YASUSHI
MURAKAMI YUHICHIROH
YAMAGUCHI TAKAHIRO
YAMADA JUNICHI
YAMANAKA HIDEKAZU
SASAKI YASUSHI
MURAKAMI YUHICHIROH
Application Number:
PCT/JP2016/064717
Publication Date:
December 01, 2016
Filing Date:
May 18, 2016
Export Citation:
Assignee:
SHARP KK (JP)
International Classes:
G11C19/28; G09G3/20; G09G3/36
Domestic Patent References:
WO2013089071A1 | 2013-06-20 |
Foreign References:
JP2014149429A | 2014-08-21 | |||
JP2014041344A | 2014-03-06 | |||
JP2006227586A | 2006-08-31 | |||
JP2014007386A | 2014-01-16 | |||
JP2000164872A | 2000-06-16 | |||
JP2003273228A | 2003-09-26 | |||
JP2010123938A | 2010-06-03 |
Attorney, Agent or Firm:
SHIMADA, AKIHIRO (JP)
Akihiro Shimada (JP)
Akihiro Shimada (JP)
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