Title:
SIGNAL GENERATION CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2024/018888
Kind Code:
A1
Abstract:
An N tap resistor network circuit (11) is provided with a plurality of first resistors and a plurality of first taps, and generates a control voltage having one of a plurality of predetermined voltage values by selecting one among the plurality of first taps in response to an inputted digital control signal. An M tap resistor network circuit (12) is provided with a plurality of second resistors and a plurality of second taps, and generates a plurality of predetermined reference voltages from the plurality of second taps. A folding circuit (13, 14) generates an output signal having a signal level corresponding to a predetermined phase of a sine wave or a cosine wave on the basis of a difference between the control voltage and the plurality of reference voltages.
Inventors:
NOSAKA HIDEYUKI (JP)
Application Number:
PCT/JP2023/024674
Publication Date:
January 25, 2024
Filing Date:
July 03, 2023
Export Citation:
Assignee:
RITSUMEIKAN TRUST (JP)
International Classes:
H03H11/40; H01Q3/36; H03C3/00; H03H11/16; H03H11/20
Domestic Patent References:
| WO2010021280A1 | 2010-02-25 |
Foreign References:
| JP2011109162A | 2011-06-02 | |||
| JP2014182346A | 2014-09-29 | |||
| JPH11205693A | 1999-07-30 | |||
| JP2010016672A | 2010-01-21 | |||
| JP2002246608A | 2002-08-30 |
Attorney, Agent or Firm:
YAMAO, Norihito et al. (JP)
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