Title:
SIGNAL PROCESSING CIRCUIT, INVERTER CIRCUIT, BUFFER CIRCUIT, DRIVER CIRCUIT, LEVEL SHIFTER, AND DISPLAY DEVICE
Document Type and Number:
WIPO Patent Application WO/2012/029874
Kind Code:
A1
Abstract:
The disclosed signal processing circuit is provided with: first and second input terminals; an output terminal; a first output unit including a bootstrap capacitor and connected to the second input terminal and the output terminal; a second output unit connected to the aforementioned first input terminal, a first power source, and the output terminal; a load control unit which is connected to the aforementioned first input terminal and controls the load of the aforementioned bootstrap capacitor; and a resistance connected at one end to the output terminal and connected at the other end to a second power source. By this means, output potential can be maintained even after the bootstrap effect has expired.
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Inventors:
MURAKAMI YUHICHIROH
SASAKI YASUSHI
YAMAMOTO ETSUO
SASAKI YASUSHI
YAMAMOTO ETSUO
Application Number:
PCT/JP2011/069824
Publication Date:
March 08, 2012
Filing Date:
August 31, 2011
Export Citation:
Assignee:
SHARP KK (JP)
MURAKAMI YUHICHIROH
SASAKI YASUSHI
YAMAMOTO ETSUO
MURAKAMI YUHICHIROH
SASAKI YASUSHI
YAMAMOTO ETSUO
International Classes:
H03K19/094; H03K19/0175
Foreign References:
| JPS615618A | 1986-01-11 | |||
| JP2009188749A | 2009-08-20 | |||
| JP2009094927A | 2009-04-30 |
Attorney, Agent or Firm:
HARAKENZO WORLD PATENT & TRADEMARK (JP)
Patent business corporation Hara [Kenzo] international patent firm (JP)
Patent business corporation Hara [Kenzo] international patent firm (JP)
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Claims: