Title:
SIGNAL PROCESSING CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2020/090699
Kind Code:
A1
Abstract:
A charge amplifier (101) with which a signal processing circuit (100) is provided comprises parallel first and second systems (SYSa, SYSb). The first system (SYSa) comprises: a first amplifier (AMP1a); a first retentive capacity (Cos1a) provided in an output path; a first switch (SW1a) provided in a short circuit path; a second switch (SW2a) provided in a feedback path; and a third switch (SW3a) of which one end is connected to a path connecting the first amplifier (AMP1a) and a reference voltage supply (Vref1), and of which the other end is connected to a path connecting the first retentive capacity (Cos1a) and a gain amplifier (102). It is possible to select a first state in which the first switch (SW1a) and the third switch (SW3a) are closed and the second switch (SW2a) is opened, or a second state in which the opening and closing of each switch are opposite. The second system (SYSb) is similar.
More Like This:
| WO/1995/013522 | CIRCUIT ASSEMBLY FOR THE CONTROL OF SIGNALS |
Inventors:
AIBARA YASUTOSHI (JP)
Application Number:
PCT/JP2019/042083
Publication Date:
May 07, 2020
Filing Date:
October 28, 2019
Export Citation:
Assignee:
MURATA MANUFACTURING CO (JP)
International Classes:
H03F3/34; G01L1/16; H03F3/45; H03F3/70
Foreign References:
| US20080191800A1 | 2008-08-14 | |||
| JP2018166272A | 2018-10-25 | |||
| JP2011047921A | 2011-03-10 | |||
| JP2008067050A | 2008-03-21 | |||
| JP2018085701A | 2018-05-31 |
Attorney, Agent or Firm:
INABA, Yoshiyuki et al. (JP)
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