Title:
SIGNAL PROCESSING DEVICE, AND SIGNAL PROCESSING METHOD
Document Type and Number:
WIPO Patent Application WO/2007/069369
Kind Code:
A1
Abstract:
It is intended to expand the bit number of information signals and to prevent the information
at that time from degradation. For this intention, a signal from an input terminal
(1) is fed through predetermined delay means (2) to a variable filter (3), and
is then fed through an arbitrary low-pass filter (4) to operation means (5), and
its difference from the output of the variable filter (3) is calculated and fed
to coefficient correction means (6). The coefficient determined by the coefficient
correction means (6) is fed to the variable filter (3). Moreover, the signal from
the input terminal (1) is fed through predetermined delay means (7) and a less
significant bit addition circuit (8) to operation means (9), and its difference
from the output of the variable filter (3) is calculated. This difference is added
through a weighting circuit (10) to the output of an addition circuit (11), and
is extracted from an output terminal (12). Moreover, the difference from the
operation means (9) is fed through a peak detection circuit (13) and a low-pass
filter (14) to a limiter circuit (15), and the signal corresponding to the less
significant value is deleted so that the weighting at the weighting circuit (10)
is performed.
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Inventors:
SATO YASUSHI (JP)
Application Number:
PCT/JP2006/315932
Publication Date:
June 21, 2007
Filing Date:
August 11, 2006
Export Citation:
Assignee:
KYUSHU INST TECHNOLOGY (JP)
SATO YASUSHI (JP)
SATO YASUSHI (JP)
International Classes:
G10L19/00; G11B20/10; H03H17/00; H03H17/02
Foreign References:
| JPH0964750A | 1997-03-07 | |||
| JPH05304474A | 1993-11-16 | |||
| JPH03267808A | 1991-11-28 | |||
| JPH08223036A | 1996-08-30 |
Attorney, Agent or Firm:
TSUNODA, Yoshisue et al. (8-1 Nishishinjuku 1-chome, Shinjuku-k, Tokyo 160-0023 Japan Tokyo 23, JP)
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