Title:
SILICON EPITAXIAL WAFER PRODUCTION METHOD AND SILICON EPITAXIAL WAFER
Document Type and Number:
WIPO Patent Application WO/2020/136972
Kind Code:
A1
Abstract:
Provided are: a silicon epitaxial wafer production method that can suppress DIC defects; and a silicon wafer. Provided is the silicon epitaxial wafer production method in which an epitaxial layer is grown in a vapor phase on the principal plane of a silicon monocrystalline wafer, the principal plane being a {110} plane or a plane having an off-angle of less than 1 degree from the {110} plane, wherein the temperature of the silicon monocrystalline wafer is set to 1,140°C to 1,165°C, and the epitaxial layer is grown in a vapor phase at a growth rate of 0.5 μm/min to 1.7 μm/min.
Inventors:
ISHIBASHI MASAYUKI (JP)
YOSHIDA MIDORI (JP)
MARUOKA DAISUKE (JP)
YOSHIDA MIDORI (JP)
MARUOKA DAISUKE (JP)
Application Number:
PCT/JP2019/030720
Publication Date:
July 02, 2020
Filing Date:
August 05, 2019
Export Citation:
Assignee:
SUMCO CORP (JP)
International Classes:
H01L21/205; B24B1/00; C23C16/24; C30B25/16; C30B29/06; H01L21/304
Domestic Patent References:
| WO2009150896A1 | 2009-12-17 |
Foreign References:
| JP2011243845A | 2011-12-01 | |||
| JP2001253797A | 2001-09-18 | |||
| JP2012043892A | 2012-03-01 | |||
| JP2007204286A | 2007-08-16 | |||
| JP2015162522A | 2015-09-07 |
Attorney, Agent or Firm:
TOKOSHIE PATENT FIRM (JP)
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