Title:
SINGLE-SIDE POLISHING METHOD FOR SILICON WAFER
Document Type and Number:
WIPO Patent Application WO/2017/134919
Kind Code:
A1
Abstract:
The purpose of the present invention is to provide a single-side polishing method for a silicon wafer capable of significantly improving the generation rate of minute step defects. The single-side polishing method for a silicon wafer according to the present invention includes: a first polishing step for performing the polishing of a single side of the silicon wafer based on a first polishing condition; and after the first polishing step, a second polishing step for performing the polishing of the silicon wafer based on a second polishing condition that has changed at least either of a pressurizing force and the relative speed in the first polishing condition, and is characterized in that the polishing rate ratio based on the first polishing condition is greater than the polishing rate ratio based on the second polishing condition.
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Inventors:
NAKAJIMA TOSHIHARU (JP)
KOZASA KAZUAKI (JP)
SUGIMORI KATSUHISA (JP)
KOBUCHI SYUNYA (JP)
KOZASA KAZUAKI (JP)
SUGIMORI KATSUHISA (JP)
KOBUCHI SYUNYA (JP)
Application Number:
PCT/JP2016/085929
Publication Date:
August 10, 2017
Filing Date:
December 02, 2016
Export Citation:
Assignee:
SUMCO CORP (JP)
International Classes:
H01L21/304; B24B37/10
Foreign References:
JP2011042536A | 2011-03-03 | |||
JPH10242090A | 1998-09-11 |
Attorney, Agent or Firm:
SUGIMURA Kenji (JP)
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